JAJSFZ6F May   2013  – August 2018 TS3DV642

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Display Port (DP) Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Docking Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 HDMI Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

5 Pin Configuration and Functions

RUA Package
42 Pin WQFN With Exposed Thermal Pad
Top View

Pin Functions

PIN TYPE DESCRIPTION
NAME NO.
VCC 1 Power Supply Voltage
SEL1 16 I Select Input 1
SEL2 17 I Select Input 2
EN 2 I Output Enable
D0+A 38 I/O Port A, Channel 0, +ve signal
D0–A 37 I/O Port A, Channel 0, –ve signal
D1+A 36 I/O Port A, Channel 1, +ve signal
D1-A 35 I/O Port A, Channel 1, –ve signal
D2+A 34 I/O Port A, Channel 2, +ve signal
D2–A 33 I/O Port A, Channel 2,–ve signal
D3+A 32 I/O Port A, Channel 3, +ve signal
D3–A 31 I/O Port A, Channel 3, –ve signal
SCL_A 42 I/O Port A, DDC Clock
SDA_A 41 I/O Port A, DDC Data
HPD_A 19 I/O Port A, Hot Plug Detects
CEC_A 18 I/O Port A, Consumer Electronics Control
D0+B 29 I/O Port B, Channel 0, +ve signal
D0–B 28 I/O Port B, Channel 0, –ve signal
D1+B 27 I/O Port B, Channel 1, +ve signal
D1–B 26 I/O Port B, Channel 1, –ve signal
D2+B 25 I/O Port B, Channel 2, +ve signal
D2–B 24 I/O Port B, Channel 2,–ve signal
D3+B 23 I/O Port B, Channel 3, +ve signal
D3–B 22 I/O Port B, Channel 3, –ve signal
SCL_B 40 I/O Port B, DDC Clock
SDA_B 39 I/O Port B, DDC Data
HPD_B 21 I/O Port B, Hot Plug Detects
CEC_B 20 I/O Port B, Consumer Electronics Control
D0+ 5 I/O Common Port, Channel 0, +ve signal
D0– 6 I/O Common Port, Channel 0, –ve signal
D1+ 7 I/O Common Port, Channel 1, +ve signal
D1– 8 I/O Common Port, Channel 1, –ve signal
D2+ 10 I/O Common Port, Channel 2, +ve signal
D2– 11 I/O Common Port, Channel 2, –ve signal
D3+ 12 I/O Common Port, Channel 3, +ve signal
D3– 13 I/O Common Port, Channel 3,–ve signal
SCL 3 I/O Common Port, DDC Clock
SDA 4 I/O Common Port, DDC Data
HPD 14 I/O Common Port, Hot Plug Detects
CEC 15 I/O Common Port, Consumer Electronics Control
NC 9, 30 NC No Connect
GND PowerPad GND Ground