JAJSGI5D November 2018 – June 2022 TLIN1441-Q1
PRODUCTION DATA
RXD is the interface to the processor's LIN protocol controlleror SCI and UART, which reports the state of the LIN bus voltage. LIN recessive (near VSUP) is represented by a high level on the RXD and LIN dominant (near ground) is represented by a low level on the RXD pin. The RXD output structure is an open-drain output stage. This allows the device to be used with 3.3 V and 5 VI/O processors. If the processor's RXD pin does not have an integrated pull-up, an external pull-up resistor to the processors I and O supply voltage is required. In standby mode, the RXD pin is driven low to indicate a wake-up request from the LIN bus .