10.2.1.4 Receiver Failsafe

The differential receivers of the SN65HVD7x family are failsafe to invalid bus states caused by the following:

• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving

In any of these cases, the differential receiver will output a failsafe logic high state so that the output of the receiver is not indeterminate.

Receiver failsafe is accomplished by offsetting the receiver thresholds such that the input indeterminate range does not include zero volts differential. In order to comply with the RS-422 and RS-485 standards, the receiver output must output a high when the differential input V_ID is more positive than 200 mV, and must output a Low when V_ID is more negative than –200 mV. The receiver parameters which determine the failsafe performance are V_IT+, V_IT–, and V_hys (the separation between V_IT+ and V_IT–). As shown in the Electrical Characteristics table, differential signals more negative than –200 mV will always cause a low receiver output, and differential signals more positive than 200 mV will always cause a high receiver output.

When the differential input signal is close to zero, it is still above the V_IT+ threshold, and the receiver output will be High. Only when the differential input is more than V_hys below V_IT+ will the receiver output transition to a Low state. Therefore, the noise immunity of the receiver inputs during a bus fault conditions includes the receiver hysteresis value, V_hys, as well as the value of V_IT+.