JAJSHN7B june   2019  – august 2023 BQ25155

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 概要 (続き)
  7. 6 Device Key Default Settings
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Linear Charger and Power Path
        1. 9.3.1.1 Battery Charging Process
          1. 9.3.1.1.1 Pre-Charge
          2. 9.3.1.1.2 Fast Charge
          3. 9.3.1.1.3 Pre-Charge to Fast Charge Transitions and Charge Current Ramping
          4. 9.3.1.1.4 Termination
        2. 9.3.1.2 JEITA and Battery Temperature Dependent Charging
        3. 9.3.1.3 Input Voltage Based Dynamic Power Management (VINDPM) and Dynamic Power Path Management (DPPM)
        4. 9.3.1.4 Battery Supplement Mode
      2. 9.3.2  Protection Mechanisms
        1. 9.3.2.1 Input Over-Voltage Protection
        2. 9.3.2.2 Safety Timer and I2C Watchdog Timer
        3. 9.3.2.3 Thermal Protection and Thermal Charge Current Foldback
        4. 9.3.2.4 Battery Short and Over Current Protection
        5. 9.3.2.5 PMID Short Circuit
      3. 9.3.3  ADC
        1. 9.3.3.1 ADC Operation in Active Battery Mode and Low Power Mode
        2. 9.3.3.2 ADC Operation When VIN Present
        3. 9.3.3.3 ADC Measurements
        4. 9.3.3.4 ADC Programmable Comparators
      4. 9.3.4  VDD LDO
      5. 9.3.5  Load Switch/LDO Output and Control
      6. 9.3.6  PMID Power Control
      7. 9.3.7  System Voltage (PMID) Regulation
      8. 9.3.8  MR Wake and Reset Input
        1. 9.3.8.1 MR Wake or Short Button Press Functions
        2. 9.3.8.2 MR Reset or Long Button Press Functions
      9. 9.3.9  14-Second Watchdog for HW Reset
      10. 9.3.10 Faults Conditions and Interrupts ( INT)
        1. 9.3.10.1 Flags and Fault Condition Response
      11. 9.3.11 Power Good ( PG) Pin
      12. 9.3.12 External NTC Monitoring (TS)
        1. 9.3.12.1 TS Thresholds
      13. 9.3.13 External NTC Monitoring (ADCIN)
      14. 9.3.14 I2C Interface
        1. 9.3.14.1 F/S Mode Protocol
    4. 9.4 Device Functional Modes
      1. 9.4.1 Ship Mode
      2. 9.4.2 Low Power
      3. 9.4.3 Active Battery
      4. 9.4.4 Charger/Adapter Mode
      5. 9.4.5 Power-Up/Down Sequencing
    5. 9.5 Register Map
      1. 9.5.1 I2C Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input (IN/PMID) Capacitors
        2. 10.2.2.2 VDD, LDO Input and Output Capacitors
        3. 10.2.2.3 TS
        4. 10.2.2.4 Recommended Passive Components
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Trademarks
    7. 13.7 用語集
  15. 14Mechanical, Packaging, and Orderable Information

8.7 Typical Characteristics

CIN = 1 µF, CPMID= 10 µF, CLSLDO = 2.2 µF, CBAT = 1 µF (unless otherwise specified)

GUID-97952F84-E595-4889-9874-701053441F43-low.gif
VIN = 5 VPMID_REG_CTRL = 111 (Pass-Through)
Figure 8-1 Battery Regulation Voltage Accuracy vs. VBATREG Setting
GUID-68959BF4-4813-47BC-B0DB-C67AAE6D3D79-low.gif
VIN = 5 VVBAT = 2.7 VICHARGE_RANGE = 0
Figure 8-3 Pre-Charge Current Accuracy vs. IPRECHARGE setting (ICHARGE_RANGE = 0)
GUID-6777CB03-0C40-4ED1-8261-0C130E0E7228-low.gif
VBUS = 5 V
Figure 8-5 LS/LDO Switch On Resistance vs. VINLS
GUID-227085D7-3127-4CAA-8C1F-90F14E07104C-low.gif
VIN = 0 VVBAT = 3.6 VVINLS = VPMID
Figure 8-7 LDO Load Regulation (VLDO = 1.8 V)
GUID-0E648EEF-AE5A-4033-BB08-CA45F6B974E1-low.gif
VBAT = 4.4 VILOAD = 150 mA
Figure 8-9 LDO Line Regulation (VLDO = 1.2 V)
GUID-349FFECB-750C-4B41-84BA-54F222DEC41C-low.gif
VBAT = 4.4 VILOAD = 150 mA
Figure 8-11 LDO Line Regulation (VLDO = 3.3 V)
GUID-1460697A-2395-439B-8225-8A6F26537662-low.gif
VBAT = 0 V
Figure 8-13 PMID Load Regulation
GUID-01D0DA93-3456-43D9-971C-5735BBD8C9D4-low.gif
VBAT = 3.6 VVIN = 5 V
Figure 8-15 Charge Current Thermal Regulation
GUID-02859FD6-03E1-4A58-804F-98C12BC51F46-low.gif
VIN = 5 VVBAT = 3.6 VICHARGE_RANGE = 1
Figure 8-2 Charge Current Accuracy vs. ICHARGE Setting
GUID-1D2631F5-48C8-48D3-A5F8-6C38D875F38A-low.gif
VBUS = 5 VVBAT = 2.7 VICHARGE_RANGE = 1
Figure 8-4 Pre-Charge Current Accuracy vs. IPRECHARGE Setting (ICHARGE_RANGE = 1)
GUID-ECEA127D-53CB-433D-9A8C-4387EF27BD53-low.gif
VIN = 0 VVBAT = 3.6 VVINLS = VPMID
Figure 8-6 LDO Load Regulation (VLDO = 0.8 V)
GUID-BBE411B2-4ABB-49CF-8AA0-456C5BA8DAAE-low.gif
VIN = 0 VVBAT = 3.6 VVINLS= VPMID
Figure 8-8 LDO Load Regulation (VLDO = 3.3 V)
GUID-47C93A25-5446-4866-BC39-A6170A216DBD-low.gif
VBAT = 4.4 VILOAD = 150 mA
Figure 8-10 LDO Line Regulation (VLDO = 1.8 V)
GUID-3DF31F28-E582-4DCF-8215-7C47C5FD1B16-low.gif
VBAT = 4.4 VILOAD = 150 mA
Figure 8-12 LDO Line Regulation (VLDO = 3.6 V)
GUID-254C3346-7D6C-4B6B-A47F-475A45D5D4CC-low.gif
VBAT = 3.6 VVIN = 5 V
Figure 8-14 PMID Load Regulation vs. Temperature