JAJSI27A October 2019 – December 2019 DAC11001A , DAC81001 , DAC91001
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The DACx1001 family of devices is controlled through a flexible four-wire serial interface that is compatible with serial interfaces used on many microcontrollers and DSP controllers. The interface provides read and write access to all registers of the DACx1001 devices. Additionally, the interface can be configured to daisy-chain multiple devices for write operations.
Each serial interface access cycle is exactly 32 bits long, as shown in Figure 46. A frame is initiated by asserting SYNC pin low. The frame ends when the SYNC pin is deasserted high. The first bit is read/write bit B31. A write is performed when this bit is set to 0, and a read is performed when this bit is set to 1. The next 7 bits are address bits B30 to B24. The next 20 bits are data. For all writes, data are clocked on the falling edge of SCLK. As Figure 47 shows, for read access and daisy-chain operation, the data are clocked out on the SDO terminal on the rising edge of SCLK.