JAJSI27A October 2019 – December 2019 DAC11001A , DAC81001 , DAC91001
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The following text shows the pseudocode to get started with the DACx1001:
//SPI Settings
//Mode: Mode-1 (CPOL: 0, CPHA: 1)
//CS Type: Active Low, Per Packet
//Frame length: 32
//SYNTAX: WRITE <REGISTER (HEX ADDRESS>, <HEX DATA>
//Select VREF, TnH mode (Good THD), LDAC mode and power-up the DAC
WRITE CONFIG (0x02), 0x004C80
//Write zero code to the DAC
WRITE DACDATA (0x01), 0x000000
//Write mid code to the DAC
WRITE DACDATA (0x01), 0x7FFFF0
//Write full code to the DAC
WRITE DACDATA (0x01), 0xFFFFF0