JAJSI73C December   2009  – December 2019 BQ24072T , BQ24075T , BQ24079T

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Options
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Undervoltage Lockout (UVLO)
      2. 9.3.2  Overvoltage Protection (OVP)
      3. 9.3.3  Dynamic Power-Path Management
      4. 9.3.4  Battery Charging
      5. 9.3.5  Charge Current Translator
      6. 9.3.6  Battery Detection and Recharge
      7. 9.3.7  Termination Disable (TD Input, BQ24072T)
      8. 9.3.8  Battery Disconnect (SYSOFF Input)
      9. 9.3.9  Dynamic Charge Timers (TMR Input)
      10. 9.3.10 Status Indicators (PGOOD, CHG)
      11. 9.3.11 Thermal Regulation and Thermal Shutdown
      12. 9.3.12 Battery Pack Temperature Monitoring
    4. 9.4 Device Functional Modes
      1. 9.4.1 Input Source Connected (Adapter or USB)
        1. 9.4.1.1 Input DPM Mode (VIN-DPM)
        2. 9.4.1.2 DPPM Mode
        3. 9.4.1.3 Battery Supplement Mode
      2. 9.4.2 Input Source Not Connected
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Using the BQ24075T, BQ24079T to Disconnect the Battery from the System
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Program the Fast Charge Current (ISET):
          2. 10.2.1.2.2 Program the Input Current Limit (ILIM):
          3. 10.2.1.2.3 Program 6.25-hour Fast-Charge Safety Timer (TMR):
          4. 10.2.1.2.4 TS Function:
          5. 10.2.1.2.5 CHG and PGOOD LED Status:
          6. 10.2.1.2.6 Processor Monitoring Status:
          7. 10.2.1.2.7 System ON/OFF (SYSOFF):
          8. 10.2.1.2.8 Selecting IN, OUT and BAT Capacitors
        3. 10.2.1.3 Application Curves
      2. 10.2.2 BQ24072T in a Host Controlled Charger Application
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedures
          1. 10.2.2.2.1 Termination Disable:
        3. 10.2.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power On
      1. 11.1.1 Half-Wave Adapters
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Package
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 関連リンク
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

8.5 Electrical Characteristics

Over junction temperature range (0°C < TJ < 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VUVLO Under-voltage lock-out VIN: 0V → 4V 3.2 3.3 3.4 V
VHYS-UVLO Hysteresis on UVLO VIN: 4V → 0V 200 300 mV
VIN-DT Input power detection threshold (Input power detected if VIN > VBAT + VIN-DT)
VBAT = 3.6V, VIN: 3.5V → 4V		 55 80 140 mV
VHYS-INDT Hysteresis on VIN-DT VBAT = 3.6V, VIN: 4V → 3.5V 20 mV
tDGL(PGOOD) Deglitch time, input power detected status Time measured from VIN: 0V → 5V,
1μs rise-time to PGOOD = LO		 1.2 ms
VOVP Input overvoltage protection threshold VIN: 5V → 7V 6.4 6.6 6.8 V
VHYS-OVP Hysteresis on OVP VIN: 7V → 5V 240 mV
tBLK(OVP) Input over-voltage blanking time 50 μs
tREC(OVP) Input over-voltage recovery time Time measured from VIN: 11V → 5V 1μs
fall-time to PGOOD = LO		 1.2 ms
ILIM, ISET SHORT CIRCUIT TEST
ISC Current source 1.3 mA
VSC 520 mV
QUIESCENT CURRENT
IBAT(PDWN) Sleep current into BAT pin CE = LO or HI, input power not detected, no load on OUT pin 6.5 μA
IIN(STDBY) Standby current into IN pin EN1= HI, EN2=HI, VIN ≤ 6V 50 μA
EN1= HI, EN2=HI, VIN > 6V 200
ICC Active supply current, IN pin CE = LO, VIN = 6V, no load on OUT pin,
VBAT > VBAT(REG), (EN1,EN2)≠(HI,HI)		 1.5 mA
POWER PATH
VDO(IN-OUT) VIN – VOUT VIN = 4.3V, IIN = 1A, VBAT = 4.2V 300 475 mV
VDO(BAT-OUT) VBAT – VOUT IOUT = 1A, VIN = 0V, VBAT > 3V 50 100 mV
VO(REG) OUT pin voltage regulation (BQ24072T) VIN > VOUT + VDO(IN-OUT) , VBAT< 3.2 V 3.3 3.4 3.5 V
VIN > VOUT + VDO(IN-OUT) , VBAT ≥ 3.2 V VBAT +
150 mV		 VBAT +
225 mV		 VBAT +
270 mV
OUT pin voltage regulation (BQ24075T, BQ24079T) VIN > VOUT + VDO(IN-OUT) 5.4 5.5 5.6
IIN-MAX Maximum input current EN1 = LO, EN2 = LO 90 95 100 mA
EN1 = HI, EN2 = LO 450 475 500 mA
EN2 = HI, EN1 = LO KILIM/RIL IM A
KILIM Maximum input current factor ILIM ≥ 500mA 1500 1600 1700 AΩ
200mA < ILIM < 500mA 1330 1512 1700
IIN-MAX Programmable input current limit range EN2 = HI, EN1 = LO, RILIM = 8kΩ to 1.1kΩ 200 1500 mA
VIN-DPM Input voltage threshold when input current is reduced EN2 = LO, EN1 = X 4.35 4.5 4.63 V
VDPPM Output voltage threshold when charging current is reduced BQ24072T VO(REG)
–180 mV		 VO(REG)
–100 mV		 VO(REG)
–30 mV		 V
BQ24075T, BQ24079T 4.2 4.3 4.4
VBSUP1 Enter battery supplement mode VOUT falling, Supplement mode entered when VOUT < VBSUP1 VBAT – 40mV V
VBSUP2 Exit battery supplement mode VOUT rising, Supplement mode exited when VOUT > VBSUP2 VBAT – 20mV V
VO(SC1) Output short-circuit detection threshold, power-on 0.8 0.9 1.0 V
VO(SC2) Output short-circuit detection threshold, supplement mode VBAT – VOUT > VO(SC2) indicates short-circuit 200 250 300 mV
tDGL(SC2) Deglitch time, supplement mode short circuit 250 μs
tREC(SC2) Recovery time, supplement mode short circuit 60 ms
BATTERY CHARGER
IBAT(SC) Source current for BAT pin short-circuit detection 4 7.5 11 mA
VBAT(SC) BAT pin short-circuit detection threshold 1.6 1.8 2.0 V
VBAT(REG) Battery charge voltage BQ24072T, BQ24075T 4.16 4.20 4.24 V
BQ24079T 4.059 4.100 4.141
VLOWV Pre-charge to fast-charge transition threshold 2.9 3 3.1 V
tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition 25 ms
tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition 25 ms
ICHG Battery fast charge current range VBAT(REG) > VBAT > VLOWV, VIN = 5V, CE = LO,
EN1= LO, EN2 = HI		 300 1500 mA
ICHG Battery fast charge current CE = LO, EN1= LO, EN2 = HI, VBAT > VLOWV,
VIN = 5V, IIN-MAX > ICHG, no load on OUT pin, thermal loop not active, DPM loop not active		 KISET/RISET A
KISET Fast charge current factor 797 890 975 AΩ
IPRECHG Pre-charge current KPRECHG /RISET A
kPRECHG Pre-charge current factor 70 88 106
ITERM Charge current value for termination detection threshold CE = LO, (EN1,EN2)≠(LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5V, DPM loop not active, thermal loop not active 		0.09×ICHG 0.1×ICHG 0.11×ICHG
CE = LO, (EN1,EN2)=(LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5V, DPM loop not active, thermal loop not active 		0.027×ICHG 0.033×ICHG 0.040×ICHG
tDGL(TERM) Deglitch time, termination detected 25 ms
VRCH Recharge detection threshold VBAT(REG)
–140mV		 VBAT(REG)
–100mV		 VBAT(REG)
–60mV		 V
tDGL(RCH) Deglitch time, recharge threshold detected 62.5 ms
tDGL(NO-IN) Delay time, input power loss to charger turn-off VBAT = 3.6V. Time measured from VIN:
5V → 3.3V 1μs fall-time 		20 ms
IBAT(DET) Sink current for battery detection 5 7.5 10 mA
tDET Battery detection timer 250 ms
BATTERY CHARGING TIMERS
tPRECHG Pre-charge safety timer value TMR = floating 1440 1800 2160 s
tMAXCH Charge safety timer value TMR = floating 14400 18000 21600 s
tPRECHG Pre-charge safety timer value(externally set) 18kΩ < RTMR < 72kΩ RTMR x KTMR s
tMAXCH Charge safety timer value (externally set) 18kΩ < RTMR < 72kΩ 10 x RTMR x KTMR s
KTMR Timer factor 35 45 55 s / kΩ
BATTERY – PACK NTC MONITOR
VHOT High temperature trip point Battery charging 12 12.5 13 % of VIN
VHYS(HOT) Hysteresis on high trip point Battery charging 1 % of VIN
VCOLD Low temperature trip point Battery charging 24.5 25 25.5 % of VIN
VHYS(COLD) Hysteresis on low trip point Battery charging 1 % of VIN
tDGL(TS) Deglitch time, pack temperature fault detection Battery charging 50 ms
THERMAL REGULATION
TJ(REG) Temperature Regulation Limit 125 °C
TJ(OFF) Thermal shutdown temperature 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
VIL Logic LOW input voltage 0 0.4 V
VIH Logic HIGH input voltage 1.4 6.0 V
IIL 1 μA
IIH 10 μA
LOGIC LEVELS ON PGOOD, CHG
VOL Output LOW voltage ISINK = 5 mA 0.4 V