The TPS259470x variants provide an active high digital output (AUXOFF) which is asserted to indicate when the priority input supply is in a valid range (above UVP/UVLO and below OVLO thresholds) and the device has successfully completed its inrush sequence. The AUXOFF pin is an open-drain signal which must be pulled up to an external supply.

After power up, AUXOFF pin is pulled low initially. The device initiates a inrush sequence in which the HFET is turned on in a controlled manner. When the FET gate voltage has reached the full overdrive indicating that the inrush sequence is complete and device is capable of delivering full power, the AUXOFF pin is asserted high. Thereafter, the AUXOFF pin is de-asserted only if the input supply becomes invalid (below UVP/UVLO or above OVLO thresholds). No load side events/faults have any control over the AUXOFF de-assertion.

This pin is used to control the auxiliary channel when 2 TPS259470x devices are connected in a priority power MUX configuration. It can also be used as a supply valid status indication to the downstream load or system supervisor.

When there is no supply to the device, the AUXOFF pin is expected to stay low. However, there is no active pull-down in this condition to drive this pin all the way down to 0 V. If the AUXOFF pin is pulled up to an independent supply which is present even if the device is unpowered, there can be a small voltage seen on this pin depending on the pin sink current, which is a function of the pull-up supply voltage and resistor. Minimize the sink current to keep this pin voltage low enough not to be detected as a logic HIGH by associated external circuits in this condition. This also ensures that the auxiliary channel is not turned off inadvertently in a priority power MUX configuration.