JAJSJ15B October   2020  – March 2022 TPS25947

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      15
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Reverse Polarity Protection
      2. 8.3.2  Undervoltage Lockout (UVLO and UVP)
      3. 8.3.3  Overvoltage Lockout (OVLO)
      4. 8.3.4  Overvoltage Clamp (OVC)
      5. 8.3.5  Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.5.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.5.2 Circuit-Breaker
        3. 8.3.5.3 Active Current Limiting
        4. 8.3.5.4 Short-Circuit Protection
      6. 8.3.6  Analog Load Current Monitor
      7. 8.3.7  Reverse Current Protection
      8. 8.3.8  Overtemperature Protection (OTP)
      9. 8.3.9  Fault Response and Indication (FLT)
      10. 8.3.10 Auxiliary Channel Control (AUXOFF)
      11. 8.3.11 Power Good Indication (PG)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Device Selection
        2. 9.3.2.2 Setting Undervoltage and Overvoltage Thresholds
        3. 9.3.2.3 Setting Output Voltage Rise Time (tR)
        4. 9.3.2.4 Setting Power Good Assertion Threshold
        5. 9.3.2.5 Setting Overcurrent Threshold (ILIM)
        6. 9.3.2.6 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 USB PD Port Protection
    7. 9.7 Parallel Operation
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

9.6 USB PD Port Protection

End equipments like PC, Notebooks, Docking Stations, Monitors etc.. have USB PD ports which can be configured as DFP (Source), UFP (Sink) or DRP (Source+Sink). TPS259470x can be used independently or in conjunction with LM73100 to handle the power path protection requirements of USB PD ports as shown in Figure 9-16 below.

TPS259470x provides Overcurrent and Short-Circuit protection in the source path, while blocking any reverse current from the port to the internal source power rail. The fast recovery (tSWRCB) from reverse current blocking ensures minimum supply droop during Fast Role Swap (FRS) events. The PD controller can also use the OVLO pin as an active low enable signal to control the power path. Holding the OVLO pin high keeps the device in OFF state in sink mode and blocks current in both directions. After the PD controller determines the need to start sourcing power, it can pull the OVLO pin low to trigger a fast recovery from OFF to ON state within tSWOV, meeting the FRS timing requirements.

The LM73100 provides overvoltage protection on the sink path, while blocking reverse current from internal sink rail to the port.

The linear ORing mechanism in TPS259470x and LM73100 ensures that there's no reverse current flowing from one power source to the other during fast or slow ramp of either supply.

GUID-20200918-CA0I-1GRX-BXDN-1LJ5D48TLP4J-low.gif Figure 9-16 USB PD Port Protection

The waveform below shows the TPS259470x behavior when a 20-V source connected at the USB bus is suddenly disconnected. The TPS259470x is initially in reverse current blocking condition. As the bus voltage starts drooping, the TPS259470x exits the condition and performs a fast charge to restore the bus voltage above vSafe5V(min) within tSWRCB, thereby meeting the USB FRS (Fast Role Swap) requirements.

GUID-20200925-CA0I-GM64-ZR0M-PQ0CKXGVMQ4W-low.gif
VIN = 5 V, COUT = 10 μF, ROUT = 8 Ω, VOUT = 20 V initially and then disconnected
Figure 9-17 TPS259470x 5-V Source Path - USB Fast Role Swap Response