JAJSJD1D February   2022  – March 2023 TIOL112 , TIOL1123 , TIOL1125

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up Detection
      2. 8.3.2  Current Limit Configuration
      3. 8.3.3  Current Fault Detection, Indication and Auto Recovery
      4. 8.3.4  Thermal Warning, Thermal Shutdown
      5. 8.3.5  Fault Reporting (NFAULT)
      6. 8.3.6  Transceiver Function Tables
      7. 8.3.7  The Integrated Voltage Regulator (LDO)
      8. 8.3.8  Reverse Polarity Protection
      9. 8.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 8.3.10 Power Up Sequence (TIOL112)
      11. 8.3.11 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch SIO Mode)
      2. 8.4.2 PNP Configuration (P-Switch SIO Mode)
      3. 8.4.3 Push-Pull, Communication Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

Typical Characteristics

GUID-20220114-SS0I-NLQL-DTX7-25NTGHKXFFX2-low.svg
No LoadTX = OpenTA = 25°C
Figure 6-1 Supply Current vs Supply Voltage
GUID-20220120-SS0I-SFBF-ZBZV-DRMF8WCHBQKB-low.svg
Figure 6-3 Residual Voltage vs Load Current:
Low Side
GUID-20220114-SS0I-BHMM-SGJZ-LSH1MRF7QQ4G-low.svg
TA = 25°C
Figure 6-5 Receiver Threshold Boundaries
GUID-20220120-SS0I-LZT0-Q3CT-DVNL35JTB63H-low.svg
Figure 6-2 Residual Voltage vs Load Current:
High Side
GUID-20221114-SS0I-PWRX-9JH5-LZ3DQN60R4Q1-low.svg
For RSET in the 0-5 kΩ range, TIOL112(x) can source/sink 500 mA required for wake-up pulse generation in IO-link applications. For RSET in the 0-5 kΩ range, TIOL112(x) also activates a pull-down current source (ILLM) when the driver is disabled. Min and max curves specified by design and characterization across temperature and process variation.
TA = 25°C (typ curve)
Figure 6-4 Current Limit vs RSET
GUID-20221114-SS0I-DVLM-JWQX-WCQP134L5T9H-low.svg
TA = 25°C
Figure 6-6 Current limit vs RSET:
TIOL112(x) vs TIOL111(x)