JAJSJD1D February   2022  – March 2023 TIOL112 , TIOL1123 , TIOL1125

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up Detection
      2. 8.3.2  Current Limit Configuration
      3. 8.3.3  Current Fault Detection, Indication and Auto Recovery
      4. 8.3.4  Thermal Warning, Thermal Shutdown
      5. 8.3.5  Fault Reporting (NFAULT)
      6. 8.3.6  Transceiver Function Tables
      7. 8.3.7  The Integrated Voltage Regulator (LDO)
      8. 8.3.8  Reverse Polarity Protection
      9. 8.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 8.3.10 Power Up Sequence (TIOL112)
      11. 8.3.11 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch SIO Mode)
      2. 8.4.2 PNP Configuration (P-Switch SIO Mode)
      3. 8.4.3 Push-Pull, Communication Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

Parameter Measurement Information

GUID-E8085B42-147B-4D46-8ADB-5D44FE0F7DFF-low.gif Figure 7-1 Test Circuit for Driver Switching
GUID-D764A3BF-60E5-4AFE-A29C-89031AEF3CA7-low.gif Figure 7-2 Waveforms for Driver Output Switching Measurements
GUID-8B0F64D3-7A7A-4C3C-88B3-0231E6B6D19C-low.gif Figure 7-3 Waveforms for Driver Enable or Disable Time Measurements
GUID-F9561ADD-1304-44A4-9286-B4E85DEE75F4-low.gif Figure 7-4 Receiver Switching Measurements
GUID-20210311-CA0I-LLFK-JTGG-QVZN4B2TXW37-low.svg Figure 7-5 Overcurrent and Wake Conditions for EN = H and ILIM_ADJ = 10 kΩ to 110 kΩ,
TX = H (Full Lines); and TX = L (Red Dotted Lines)
GUID-20210216-CA0I-XLXG-TZLW-52PV1S24ZFRL-low.svgFigure 7-6 Wake Conditions for EN = L, RX = H (Full Lines); and RX = L (Red Dotted Lines)
GUID-20210311-CA0I-TC22-2H3B-DRD3GTNXX5MB-low.svgFigure 7-7 Overcurrent and Wake Conditions for EN = H and ILIM_ADJ is floating, TX = H (Full Lines); and TX = L (Red Dotted Lines)