JAJSJD1D February   2022  – March 2023 TIOL112 , TIOL1123 , TIOL1125

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up Detection
      2. 8.3.2  Current Limit Configuration
      3. 8.3.3  Current Fault Detection, Indication and Auto Recovery
      4. 8.3.4  Thermal Warning, Thermal Shutdown
      5. 8.3.5  Fault Reporting (NFAULT)
      6. 8.3.6  Transceiver Function Tables
      7. 8.3.7  The Integrated Voltage Regulator (LDO)
      8. 8.3.8  Reverse Polarity Protection
      9. 8.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 8.3.10 Power Up Sequence (TIOL112)
      11. 8.3.11 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch SIO Mode)
      2. 8.4.2 PNP Configuration (P-Switch SIO Mode)
      3. 8.4.3 Push-Pull, Communication Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

Maximum Junction Temperature Check

For a 200 mA current limit:

  • Choose driver output current limit, IO(LIM) = 250 mA (allowing for current limit tolerance); RSET = 27 kΩ
  • The maximum voltage drop across the high-side switch at 250 mA current is VDS(ON) = 1.1 V.

This causes a power consumption of:

Equation 1. PDOP=VDS(ON)× IO(LIM)=1.1 V ×250 mA=275 mW

For a 5 mA LDO current output,

Equation 2. PDLDO=VL+-VVCCOUT× IVCC_OUT=30-5V ×5 mA=125 mW

Total power dissipation,

Equation 3. PD= PDLDO+PDOP=275 mW+125 mW=400 mW 

Multiply this value with the Junction-to-ambient thermal resistance of θJA = 45.9 °C/W (taken from the Thermal Information table table) to receive the difference between junction temperature, TJ, and ambient temperature, TA:

Equation 4. T=TJ-TA=PD × θJA=400 mW × 45.9 W=18.36 

Add this value to the maximum ambient temperature of TA = 105°C to receive the final junction temperature:

Equation 5. TJ=TA+ T=TA+ PD × θJA=105 + 400 mW × 45.9 W=105 +18.36 = 123.36 

As long as TJ is below the recommended maximum value of 150°C, no thermal shutdown will occur. However, the junction temperature is closer to TWRN and thermal warning may be generated if the junction temperature rises above TWRN.

Note that the modeling of the complete system may be necessary to predict junction temperature in smaller PCBs and/or enclosures without air flow.