JAJSK58D January   2022  – April 2024 TPS4811-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charge Pump and Gate Driver output (VS, PU, PD, BST, SRC)
      2. 8.3.2  Capacitive Load Driving
        1. 8.3.2.1 FET Gate Slew Rate Control
        2. 8.3.2.2 Using Precharge FET - (with TPS48111-Q1 Only)
      3. 8.3.3  Short-Circuit Protection
        1. 8.3.3.1 Overcurrent Protection With Auto-Retry
        2. 8.3.3.2 Overcurrent Protection With Latch-Off
      4. 8.3.4  Short-Circuit Protection
      5. 8.3.5  Analog Current Monitor Output (IMON)
      6. 8.3.6  Overvoltage (OV) and Undervoltage Protection (UVLO)
      7. 8.3.7  Device Functional Mode (Shutdown Mode)
      8. 8.3.8  Remote Temperature sensing and Protection (DIODE)
      9. 8.3.9  Output Reverse Polarity Protection
      10. 8.3.10 TPS4811x-Q1 as a Simple Gate Driver
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Driving HVAC PTC Heater Load on KL40 Line in Power Distribution Unit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application: Driving B2B FETs With Pre-charging the Output Capacitance
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Detailed Design Procedure

Selection of Current Sense Resistor, RSNS

The recommended range of the overcurrent protection threshold voltage, V(SNS_WRN), extends from 10 mV to 200 mV. Values near the low threshold of 10 mV can be affected by the system noise. Values near the upper threshold of 200 mV can cause high power dissipation in the current sense resistor. To minimize both the concerns, 25 mV is selected as the overcurrent protection threshold voltage. The current sense resistor, RSNS can be calculated using Equation 13.

Equation 13. TPS4811-Q1

The next smaller available sense resistor 1.5 mΩ, 1% is chosen.

Selection of Scaling Resistor, RSET

RSET is the resistor connected between VS and CS+ pins. This resistor scales the overcurrent protection threshold voltage and coordinates with RIWRN and RIMON to determine the overcurrent protection threshold and current monitoring output. The recommended range of RSET is 50 Ω–100 Ω.

RSET is selected as 100 Ω, 1% for this design example.

Programming the Overcurrent Protection Threshold – RIWRN Selection

The RIWRN sets the overcurrent protection (circuit breaker detection) threshold, whose value can be calculated using Equation 14.

Equation 14. TPS4811-Q1

To set 15 A as overcurrent protection threshold, RIWRN value is calculated to be 52.88 kΩ.

Choose the closest available standard value: 54 kΩ, 1%

.

Programming the Short-Circuit Protection Threshold – RISCP Selection

The RISCP sets the short-circuit protection threshold, whose value can be calculated using Equation 15.

Equation 15. R I S C P   ( Ω ) = I S C   ×   R S N S 15.6   µ   -   600

To set 20 A as short-circuit protection threshold, RISCP value is calculated to be 1.32 kΩ.

Choose the closest available standard value: 1.3 kΩ, 1%.

In case where large di/dt is involved, the system and layout parasitic inductances can generate large differential signal voltages between ISCP and CS- pins. This action can trigger false short-circuit protection and nuisance trips in the system. To overcome such scenario, TI recommends to add filter capacitor of 1 nF across ISCP and CS- pins close to the device. Because nuisance trips are dependent on the system and layout parasitics, TI recommends to test the design in a real system and tweaked as necessary.

Programming the Fault timer Period – CTMR Selection

For the design example under discussion, overcurrent transients are allowed for 1-ms duration. This blanking interval, tOC (or circuit breaker interval, TCB) can be set by selecting appropriate capacitor CTMR from TMR pin to ground. The value of CTMR to set 1 ms for tOC can be calculated using Equation 16.

Equation 16. C T M R = 82   µ   ×   t O C 1.2   =   68.33   n F

Choose closest available standard value: 68 nF, 10%.

Selection of MOSFET, Q1

For selecting the MOSFET Q1, important electrical parameters are the maximum continuous drain current ID, the maximum drain-to-source voltage VDS(MAX), the maximum drain-to-source voltage VGS(MAX), and the drain-to-source ON resistance RDSON.

The maximum continuous drain current, ID, rating must exceed the maximum continuous load current.

The maximum drain-to-source voltage, VDS(MAX), must be high enough to withstand the highest voltage seen in the application. Considering 60 V as the maximum application voltage, MOSFETs with VDS voltage rating of 80 V is suitable for this application.

The maximum VGS TPS4811-Q1 can drive is 13 V, so a MOSFET with 15-V minimum VGS rating must be selected.

To reduce the MOSFET conduction losses, lowest possible RDS(ON) is preferred.

Based on the design requirements, IPB160N08S4-03ATMA1 is selected and its ratings are:

  • 80-V VDS(MAX) and ±20-V VGS(MAX)

  • RDS(ON) is 2.6-mΩ typical at 10-V VGS

  • MOSFET Qg(total) is 86 nC

Selection of Bootstrap Capacitor, CBST

The internal charge pump charges the external bootstrap capacitor (connected between BST and SRC pins) with approximately 100 μA. In case of switching applications, the BST must be powered externally from VAUX supply (ranging between 8.1 V to 15 V) through a low-leakage silicon diode such as CMHD3595 or BAT46WH,115 to avoid collapsing the BST-SRC supply. This need is determined by the value of the switching frequency and MOSFET gate charge.

The maximum possible frequency without external supply is given by Equation 17.

Equation 17. TPS4811-Q1

As the present application is switched at 100 Hz, external supply is not required. Use the following equation to calculate the minimum required value of the bootstrap capacitor for driving two parallel BUK7S0R5-40HJ MOSFETs.

Equation 18. C B S T   =   Q g ( t o t a l ) 1   V   =   380   n F

Choose closest available standard value: 470 nF, 10 %.

Setting the Undervoltage Lockout and Overvoltage Set Point

The undervoltage lockout (UVLO) and overvoltage set point are adjusted using an external voltage divider network of R1, R2 and R3 connected between VS, EN/UVLO, OVP and GND pins of the device. The values required for setting the undervoltage and overvoltage are calculated by solving Equation 19 and Equation 20.

Equation 19. TPS4811-Q1
Equation 20. TPS4811-Q1

For minimizing the input current drawn from the power supply, TI recommends to use higher values of resistance for R1, R2 and R3. However, leakage currents due to external active components connected to the resistor string can add error to these calculations. So, the resistor string current, I(R123) must be chosen to be 20 times greater than the leakage current of UVLO and OVP pins.

From the device electrical specifications, V(OVR) = 1.18 V and V(UVLOR) = 1.18 V. From the design requirements, VINOVP is 58 V and VINUVLO is 24 V. To solve the equation, first choose the value of R1 = 470 kΩ and use Equation 20 to solve for (R2 + R3) = 24.3 kΩ. Use Equation 19 and value of (R2 + R3) to solve for R3 = 10.1 kΩ and finally R2 = 14.2 kΩ. Choose the closest standard 1 % resistor values: R1 = 470 kΩ, R2 = 14.3 kΩ, and R3 = 10.2 kΩ.

Choosing the Current Monitoring Resistor, RIMON

Voltage at IMON pin V(IMON) is proportional to the output load current. This can be connected to an ADC of the downstream system for monitoring the operating condition and health of the system. The RIMON must be selected based on the maximum load current and the input voltage range of the ADC used. RIMON is set using Equation 21.

Equation 21. V ( I M O N )   =   ( V S N S   +   V ( O S _ S E T ) )   ×   0.9   ×   R I M O N R S E T

Where VSNS = IOC × RSNS and V(OS_SET) is the input referred offset (± 200 µV) of the current sense amplifier.

For IOC = 15 A and considering the operating range of ADC to be 0 V to 3.3 V (for example, V(IMON) = 3.3 V), RIMON can be calculated as

Equation 22. R I M O N   =     V ( I M O N )   ×   R S E T ( V S N S   +   V ( O S _ S E T ) )   ×   0.9   =   16.52   k Ω

Selecting RIMON value less than shown in Equation 22 ensures that ADC limits are not exceeded for maximum value of load current. Choose the closest available standard value: 16.5 kΩ, 1%.