JAJSK58D January 2022 – April 2024 TPS4811-Q1
PRODUCTION DATA
The recommended range of the overcurrent protection threshold voltage, V(SNS_WRN), extends from 10 mV to 200 mV. Values near the low threshold of 10 mV can be affected by the system noise. Values near the upper threshold of 200 mV can cause high power dissipation in the current sense resistor. To minimize both the concerns, 25 mV is selected as the overcurrent protection threshold voltage. The current sense resistor, RSNS can be calculated using Equation 13.
The next smaller available sense resistor 1.5 mΩ, 1% is chosen.
RSET is the resistor connected between VS and CS+ pins. This resistor scales the overcurrent protection threshold voltage and coordinates with RIWRN and RIMON to determine the overcurrent protection threshold and current monitoring output. The recommended range of RSET is 50 Ω–100 Ω.
RSET is selected as 100 Ω, 1% for this design example.
The RIWRN sets the overcurrent protection (circuit breaker detection) threshold, whose value can be calculated using Equation 14.
To set 15 A as overcurrent protection threshold, RIWRN value is calculated to be 52.88 kΩ.
Choose the closest available standard value: 54 kΩ, 1%
.
The RISCP sets the short-circuit protection threshold, whose value can be calculated using Equation 15.
To set 20 A as short-circuit protection threshold, RISCP value is calculated to be 1.32 kΩ.
Choose the closest available standard value: 1.3 kΩ, 1%.
In case where large di/dt is involved, the system and layout parasitic inductances can generate large differential signal voltages between ISCP and CS- pins. This action can trigger false short-circuit protection and nuisance trips in the system. To overcome such scenario, TI recommends to add filter capacitor of 1 nF across ISCP and CS- pins close to the device. Because nuisance trips are dependent on the system and layout parasitics, TI recommends to test the design in a real system and tweaked as necessary.
For the design example under discussion, overcurrent transients are allowed for 1-ms duration. This blanking interval, tOC (or circuit breaker interval, TCB) can be set by selecting appropriate capacitor CTMR from TMR pin to ground. The value of CTMR to set 1 ms for tOC can be calculated using Equation 16.
Choose closest available standard value: 68 nF, 10%.
For selecting the MOSFET Q1, important electrical parameters are the maximum continuous drain current ID, the maximum drain-to-source voltage VDS(MAX), the maximum drain-to-source voltage VGS(MAX), and the drain-to-source ON resistance RDSON.
The maximum continuous drain current, ID, rating must exceed the maximum continuous load current.
The maximum drain-to-source voltage, VDS(MAX), must be high enough to withstand the highest voltage seen in the application. Considering 60 V as the maximum application voltage, MOSFETs with VDS voltage rating of 80 V is suitable for this application.
The maximum VGS TPS4811-Q1 can drive is 13 V, so a MOSFET with 15-V minimum VGS rating must be selected.
To reduce the MOSFET conduction losses, lowest possible RDS(ON) is preferred.
Based on the design requirements, IPB160N08S4-03ATMA1 is selected and its ratings are:
80-V VDS(MAX) and ±20-V VGS(MAX)
RDS(ON) is 2.6-mΩ typical at 10-V VGS
MOSFET Qg(total) is 86 nC
The internal charge pump charges the external bootstrap capacitor (connected between BST and SRC pins) with approximately 100 μA. In case of switching applications, the BST must be powered externally from VAUX supply (ranging between 8.1 V to 15 V) through a low-leakage silicon diode such as CMHD3595 or BAT46WH,115 to avoid collapsing the BST-SRC supply. This need is determined by the value of the switching frequency and MOSFET gate charge.
The maximum possible frequency without external supply is given by Equation 17.
As the present application is switched at 100 Hz, external supply is not required. Use the following equation to calculate the minimum required value of the bootstrap capacitor for driving two parallel BUK7S0R5-40HJ MOSFETs.
Choose closest available standard value: 470 nF, 10 %.
The undervoltage lockout (UVLO) and overvoltage set point are adjusted using an external voltage divider network of R1, R2 and R3 connected between VS, EN/UVLO, OVP and GND pins of the device. The values required for setting the undervoltage and overvoltage are calculated by solving Equation 19 and Equation 20.
For minimizing the input current drawn from the power supply, TI recommends to use higher values of resistance for R1, R2 and R3. However, leakage currents due to external active components connected to the resistor string can add error to these calculations. So, the resistor string current, I(R123) must be chosen to be 20 times greater than the leakage current of UVLO and OVP pins.
From the device electrical specifications, V(OVR) = 1.18 V and V(UVLOR) = 1.18 V. From the design requirements, VINOVP is 58 V and VINUVLO is 24 V. To solve the equation, first choose the value of R1 = 470 kΩ and use Equation 20 to solve for (R2 + R3) = 24.3 kΩ. Use Equation 19 and value of (R2 + R3) to solve for R3 = 10.1 kΩ and finally R2 = 14.2 kΩ. Choose the closest standard 1 % resistor values: R1 = 470 kΩ, R2 = 14.3 kΩ, and R3 = 10.2 kΩ.
Voltage at IMON pin V(IMON) is proportional to the output load current. This can be connected to an ADC of the downstream system for monitoring the operating condition and health of the system. The RIMON must be selected based on the maximum load current and the input voltage range of the ADC used. RIMON is set using Equation 21.
Where VSNS = IOC × RSNS and V(OS_SET) is the input referred offset (± 200 µV) of the current sense amplifier.
For IOC = 15 A and considering the operating range of ADC to be 0 V to 3.3 V (for example, V(IMON) = 3.3 V), RIMON can be calculated as
Selecting RIMON value less than shown in Equation 22 ensures that ADC limits are not exceeded for maximum value of load current. Choose the closest available standard value: 16.5 kΩ, 1%.