JAJSK58D January   2022  – April 2024 TPS4811-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charge Pump and Gate Driver output (VS, PU, PD, BST, SRC)
      2. 8.3.2  Capacitive Load Driving
        1. 8.3.2.1 FET Gate Slew Rate Control
        2. 8.3.2.2 Using Precharge FET - (with TPS48111-Q1 Only)
      3. 8.3.3  Short-Circuit Protection
        1. 8.3.3.1 Overcurrent Protection With Auto-Retry
        2. 8.3.3.2 Overcurrent Protection With Latch-Off
      4. 8.3.4  Short-Circuit Protection
      5. 8.3.5  Analog Current Monitor Output (IMON)
      6. 8.3.6  Overvoltage (OV) and Undervoltage Protection (UVLO)
      7. 8.3.7  Device Functional Mode (Shutdown Mode)
      8. 8.3.8  Remote Temperature sensing and Protection (DIODE)
      9. 8.3.9  Output Reverse Polarity Protection
      10. 8.3.10 TPS4811x-Q1 as a Simple Gate Driver
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Driving HVAC PTC Heater Load on KL40 Line in Power Distribution Unit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application: Driving B2B FETs With Pre-charging the Output Capacitance
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

TJ = –40℃ to +125℃; typical values at TJ = 25°C, V(VS) = V(CS+) = V(CS–) = 48 V, V(BST – SRC) = 12 V, V(SRC) = 0 V, VSNS = Voltage across RSNS
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
V(VS) Operating input voltage 3.5 80 V
V(VS_PORR) VS POR threshold, rising 2.75 3 3.2 V
V(VS_PORF) VS POR threshold, falling 2.65 2.9 3.1 V
I(Q) Total System Quiescent current, I(GND) V(EN/UVLO) = 2 V 613 700 µA
I(SHDN) SHDN current, I(GND) V(EN/UVLO) = 0 V, V(SRC) = 0 V 1.6 5.36 µA
V(EN/UVLO) = 0 V, V(SRC) = 0 V, –40℃ < Tj < 85℃ 1.6 2.65 µA
ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO)  INPUT
V(UVLOR) UVLO threshold voltage, rising 1.16 1.18 1.2 V
V(UVLOF) UVLO threshold voltage, falling 1.1 1.11 1.13 V
V(ENF) Enable threshold voltage for low IQ shutdown, falling 0.3 0.7 0.9 V
Enable Hysteresis 43 60 mV
I(EN/UVLO) Enable input leakage current V(EN/UVLO)  = 12 V 61 320 nA
OVER VOLTAGE PROTECTION (OV) INPUT - TPS48110-Q1 Only
V(OVR) Overvoltage threshold input, risIng TPS48110-Q1 Only 1.16 1.18 1.2 V
V(OVF) Overvoltage threshold input, falling 1.1 1.11 1.13 V
I(OV) OV Input leakage current 0 V < V(OV) < 5 V 60 300 nA
CHARGE PUMP (BST–SRC)
I(BST) Charge Pump Supply current V(BST – SRC)  = 10 V 80 100 126 µA
V(BST – SRC) Charge Pump Turn ON voltage 11 11.7 12.3 V
Charge Pump Turn OFF voltage 11.6 12.3 13 V
V(BST_UVLOR) V(BST – SRC) UVLO voltage threshold, rising 7 7.6 8.1 V
V(BST_UVLOF) V(BST – SRC) UVLO voltage threshold, falling 6 6.5 6.9 V
V(BST – SRC) Charge Pump Voltage at V(VS) = 3.5 V 8.6 V
GATE DRIVER OUTPUTS (PU, PD, G)
R(PD) Pull-Down Resistance 0.69 1.34 Ω
I(PU) Peak Source Current 3.75 A
I(PD) Peak Sink Current 4 A
I(G) Gate charge (sourcing) current, on state TPS48111-Q1 Only 72 100 140 µA
Gate discharge (sinking) current, off state 92 131 190 mA
CURRENT SENSE AND OVER CURRENT PROTECTION (CS+, CS–, IMON, ISCP, IWRN)
V(OS_SET) Input referred offset (VSNS to V(IMON) scaling) RSET = 100 Ω, RIMON =  5 kΩ, 10 kΩ (corresponds to  VSNS = 6 mV to 30 mV) Gain of 45 and 90 respectively. –200 200 µV
V(GE_SET) Gain error (VSNS to V(IMON) scaling) –1.27 1.27 %
V(IMON_Acc) IMON accuracy VSNS = 30 mV, RSET = 100 Ω, RIMON =  10 kΩ  –2 2 %
VSNS = 6 mV, RSET = 100 Ω, RIMON =  5 kΩ  –5 5 %
V(SNS_WRN) Overcurrent protection (OCP) voltage threshold RSET = 100 Ω, RIWRN = 39.7 kΩ 29.2 30.6 31.5 mV
RSET = 100 Ω, RIWRN = 120 kΩ 8 10 12 mV
I(ISCP) SCP Input Bias current 13.7 15.6 17.6 µA
V(SNS_SCP) Short-circuit protection (SCP) voltage threshold RISCP =  2.1 kΩ 35 40 45 mV
RISCP = 750 Ω 19 mV
DELAY TIMER (TMR)
I(TMR_SRC_CB) TMR source current 73 82 91 µA
I(TMR_SRC_FLT) TMR source current  2.1 2.5 3.3 µA
I(TMR_SNK) TMR sink current 2.1 2.5 3 µA
V(TMR_OC) TMR voltage threshold for over current shutdown 1.112 1.2 1.3 V
V(TMR_FLT) TMR voltage threshold for FLT_T assertion 1.03 1.1 1.2 V
V(TMR_LOW) Voltage at TMR pin for AR counter falling threshold 0.15 0.2 0.22 V
INPUT CONTROLS (INP, INP_G), FAULT FLAGS (FLT_I, FLT_T)
R(FLT_I) FLT_I Pull-down resistance 54 70 90 Ω
R(FLT_T) FLT_T Pull-down resistance 70 Ω
I(FLT_T) FLT Input leakage current 400 nA
V(INP_H) 1.6 2 V
V(INP_L) 0.8 1.2 V
V(INP_Hys) 400 mV
V(INP_G_H) TPS48111–Q1 Only 1.6 2 V
V(INP_G_L) 0.8 1.2 V
V(INP_G_Hys) 400 mV
TEMPERATURE SENSING AND PROTECTION (DIODE)
I(DIODE) External diode current source High level 160 µA
Low level 10 µA
Diode current ratio 15.4 16 16.6 A/A
T(DIODE_TSD_rising) DIODE sense TSD rising threshold With MMBT3904 BJT for sensing 140 150 160 ℃