JAJSK66A March   2021  – March 2022 TPS2521

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      15
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Reverse Polarity Protection
      2. 8.3.2 Undervoltage Lockout (UVLO and UVP)
      3. 8.3.3 Overvoltage Clamp (OVC)
      4. 8.3.4 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.4.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.4.2 Active Current Limiting
        3. 8.3.4.3 Short-Circuit Protection
      5. 8.3.5 Analog Load Current Monitor
      6. 8.3.6 Reverse Current Protection
      7. 8.3.7 Overtemperature Protection (OTP)
      8. 8.3.8 Fault Response
      9. 8.3.9 Power Good Indication (PG)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Application
      2. 9.3.2 Design Requirements
      3. 9.3.3 Detailed Design Procedure
        1. 9.3.3.1 Device Selection
        2. 9.3.3.2 Setting Undervoltage and Overvoltage Thresholds
        3. 9.3.3.3 Setting Output Voltage Rise Time (tR)
        4. 9.3.3.4 Setting Power Good Assertion Threshold
        5. 9.3.3.5 Setting Overcurrent Threshold (ILIM)
        6. 9.3.3.6 Setting Overcurrent Blanking Interval (tITIMER)
      4. 9.3.4 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
Parameter Pin MIN MAX UNIT
VIN Maximum Input Voltage Range, –40℃ ≤ TJ ≤ 125℃ IN max(–15, VOUT – 21) 28 V
Maximum Input Voltage Range, –10℃ ≤ TJ ≤ 125℃ max(–15, VOUT – 22) 28 V
VOUT Maximum Output Voltage Range, –40℃ ≤ TJ ≤ 125℃ OUT –0.3 min (28, VIN + 21)
Maximum Output Voltage Range, –10℃ ≤ TJ ≤ 125℃ –0.3 min (28, VIN + 22)
VOUT,PLS Minimum Output Voltage Pulse (< 1 µs) OUT –0.8
VEN/UVLO Maximum Enable Pin Voltage Range (2) EN/UVLO –0.3 6.5 V
VOVCSEL Maximum OVCSEL Pin Voltage Range  OVCSEL Internally Limited V
VdVdT Maximum dVdT Pin Voltage Range dVdt Internally Limited V
VITIMER Maximum ITIMER Pin Voltage Range ITIMER Internally Limited V
VPGTH Maximum PGTH Pin Voltage Range (2) PGTH –0.3 6.5 V
VPG Maximum PG Pin Voltage Range PG –0.3 6.5 V
VILM Maximum ILM Pin Voltage Range ILM Internally Limited V
IMAX Maximum Continuous Switch Current IN to OUT Internally Limited A
TJ Junction temperature Internally Limited °C
TLEAD Maximum Lead Temperature 300 °C
TSTG Storage temperature –65 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) If this pin has a pull-up up to VIN, it is recommended to use a resistance of 350 kΩ or higher to limit the current under conditions where IN can be exposed to reverse polarity.