JAJSKF6C November   2020  – December 2021 TPS2661

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Overload Protection and Fast-Trip
      2. 8.3.2 Reverse Current Blocking for Unipolar Current Inputs TPS26610, TPS26611 and TPS26612 (4–20 mA, 0–20 mA)
      3. 8.3.3 OUTPUT and INPUT Cutoff During Overvoltage, Undervoltage Due to Miswiring
        1. 8.3.3.1 Output Overvoltage With TPS2661x Devices
        2. 8.3.3.2 Output or Input Undervoltage With TPS26610, TPS26611 and TPS26612
        3. 8.3.3.3 Output Undervoltage With TPS26613 and TPS26614
      4. 8.3.4 External Power Supply (±Vs)
      5. 8.3.5 Loop Testing Without ±Vs Supply (Loop Power Mode in TPS26610, TPS26613 Only)
        1. 8.3.5.1 Supply Sensing With VSNS for Loop Power Mode With TPS26610 and TPS26613
      6. 8.3.6 Enable Control With TPS26611, TPS26612, and TPS26614
      7. 8.3.7 Signal Good Indicator (SGOOD)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Analog Input Protection for Current Inputs with TPS26610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure for Current Inputs with TPS26610
        1. 9.2.2.1 Selecting ±Vs Supplies for TPS26610
        2. 9.2.2.2 Selecting RBurden
        3. 9.2.2.3 Selecting MODE Configuration for TPS26610
      3. 9.2.3 Application Performance Plots for Current Inputs with TPS26610
    3. 9.3 Typical Application: Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure for Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
        1. 9.3.2.1 Selecting ±Vs Supplies for TPS26611
        2. 9.3.2.2 Selecting MODE Configuration for TPS26611
        3. 9.3.2.3 Selecting Bias Resistors R1, R2 for Setting Common Mode Voltage for Voltage Inputs
      3. 9.3.3 Application Performance Plots for V/I Inputs with TPS26611
    4. 9.4 System Examples
      1. 9.4.1 Power Supply Protection of 2-Wire Transmitter with TPS26612
      2. 9.4.2 Protection of 3-Wire Transmitters and Analog Output Modules With TPS26611, TPS26612
      3. 9.4.3 UART IO Protection With TPS26611, TPS26612
      4. 9.4.4 Higher Loop Impedance With TPS26613 and TPS26614
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.6 Timing Requirements

–40° C ≤ TA = TJ ≤ +125° C, 2.25 V < +Vs < 30 V, -20 V < -Vs < 0 V, MODE = GND, SGOOD = Open, EN = 3.3V (All voltages referenced to GND, (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tON_dly Turn ON delay with Vs/-Vs supply Delay from +Vs/-Vs supply applied to FET on, EN = Floating 120 µs
tOFF_dly Turn OFF delay with +Vs/-Vs supply Delay from +Vs/-Vs supply removed to FET off, EN = Floating 10 µs
tON_EN_dly Turn ON delay with EN pin +Vs/-Vs supply present, Delay from EN HIGH to FET on, 120 µs
tOFF_EN_dly Turn OFF delay with EN pin +Vs/-Vs supply present, Delay from EN LOW to FET off 10 µs
tOL Overload Current Limit response time Load transient from 20 mA to 50 mA. Time from Load Transient to Current coming within 20%.of IOL. 30 55 µs
tOL_PULSE Pulse Overload Current Limit response time Load transient from 20 mA to 80 mA. Time from Load Transient to Current coming within 20% of IOL_Pulse 20 50 µs
tFASTRIP Fast-Trip Response Time MODE = GND, Current exceeding 120mA to FET off 5 µs
MODE = 180-kΩto GND or Open, Current exceeding 240 mA to FET off 5 µs
TSG_Deglitch SGOOD Deglitch Delay Deglitch delay during SGOOD assertion  685 µs
Deglitch delay during SGOOD de-assertion 1.3 ms
tOUT_OV_CUT OUT OVLO Cutoff detection-time V(OUT) ↑ 100 mV above VOUT_OVLO to FET OFF 1 5 µs
tO/I_UV_CUT OUT OR IN UVLO Cutoff detectiontime OUT/IN ↓100 mV below VO/I_UVLO to FET OFF, TPS26610/11/12 Only 1 5 µs
tO_UV_CUT OUT  UVLO Cutoff detection-time OUT ↓100 mV below VO_UVLO to FET OFF, TPS26613/14 Only 1 5 µs
tOUT_CUT_Rec OUT Cutoff recovery time V(OUT) ↓ 100 mV below VOUT_OVLO_hyst to FET ON 21 µs
tO/I_CUT_Rec IN OR OUT Cutoff recovery time OUT/IN ↑100 mV above VO/I_UVLO_hyst to FET ON, TPS26610/11/12 Only 23.5 µs
tO_CUT_Rec OUT Cutoff recovery time OUT↑100 mV above VO_UVLO_hyst to FET ON, TPS26613/14 Only 23.5 µs
tOL_Expiry Overload Current Limit expiry time Load transient from 20 mA to 50 mA  100 ms
tOL_Pulse_Expiry Pulse Overload Current expiry Load transient from 20 mA to 100 mA   50 ms
tOL_Extend IOL < I < IOL_PULSE expiry timer 5.00 s
tRETRY1 Auto Retry Timer 1 0.80 s
tRETRY2 Auto Retry Timer 2 1.60 s
tAR_dis Auto Retry disabled time (TPS26612 only) 5 s