JAJSKP0B february   2022  – june 2023 TIOS102 , TIOS1023 , TIOS1025

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Current Limit Configuration
      2. 8.3.2  Current Fault Detection, Indication and Auto Recovery
      3. 8.3.3  Thermal Warning, Thermal Shutdown
      4. 8.3.4  Fault Reporting (NFAULT)
      5. 8.3.5  Device Function Tables
      6. 8.3.6  The Integrated Voltage Regulator (LDO)
      7. 8.3.7  Reverse Polarity Protection
      8. 8.3.8  Integrated Surge Protection and Transient Waveform Tolerance
      9. 8.3.9  Power Up Sequence
      10. 8.3.10 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch Mode)
      2. 8.4.2 PNP Configuration (P-Switch Mode)
      3. 8.4.3 Push-Pull Mode
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 最大接合部温度チェック
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Data

6.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted). Typical values are at VVCC = 24 V, VVCC_IN = 3.3 V, VVCC_OUT = 3.3 V and TA = 25 ℃ unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (VCC)
I(VCC) Quiescent supply current EN = LOW, no load 1 1.5 mA
EN = HIGH, no load 2.1 2.95 mA
LOGIC-LEVEL INPUTS (EN, IN, VSEL)
VIL Input logic low voltage 0.8 V
VIH Input logic high voltage 2 V
RPD Pull-down (EN) resistance 100 kΩ
RPU Pull-up (IN) resistance 200 kΩ
RPU Pull-up (VSEL) resistance 1000 kΩ
CONTROL OUTPUTS (NFAULT)
VOL Output logic low voltage IO = 4 mA 0.5 V
IOZ Output high impedance leakage Output in Hi-Z, VO = 0 V or VCC_IN/OUT –1 1 µA
DRIVER OUTPUT (OUT)
RDS(ON) High-side driver on-resistance 2.5 4.5 Ω
VDS(ON) High-side driver residual voltage I = 200 mA 0.5 0.9 V
I = 100 mA 0.25 0.5 V
RDS(ON) Low-side driver on-resistance 2.5 4.5 Ω
VDS(ON) Low-side driver residual voltage I = 200 mA 0.5 0.9 V
I = 100 mA 0.25 0.5 V
IPD OUT pull-down current EN = LOW, IN = LOW, RSET:  >= 10 kΩ 0 ≤ V(OUT) ≤ (V(VCC) - 0.1) V 40 50 80 µA
IPU OUT pull-up current EN = LOW, IN = HIGH 40 50 80 µA
IO(LIM) Driver output current limit RSET = 10 kΩ; 
V(OUT) = (V(VCC)-3) V or 3 V		 300 350 400 mA
RSET = 110 kΩ; 
V(OUT) = (V(VCC)-3) V or 3 V		 35 50 70 mA
RSET = 0 to 5 kΩ; (3) 
V(OUT) = (V(VCC)-3) V or 3 V
TJ < T(SDN) or t < 200 µs		 500 mA
(Fast-detect mode) RSET = OPEN(1)
V(OUT) = (V(VCC)-3) V or 3 V		 260 330 400 mA
PROTECTION CIRCUITS
V(UVLO) VCC under voltage lockout VCC falling; NFAULT = Hi-Z TIOS102 and 3.3V LDO version 4.2 4.4 V
V(UVLO) VCC under voltage lockout  VCC rising; NFAULT = Hi-Z 4.6 4.75 V
V(UVLO) VCC under voltage lockout VCC falling; NFAULT = Hi-Z TIOS1025 6 6.3 V
VCC rising; NFAULT = Hi-Z 6.5 6.8 V
V(UVLO,HYS) VCC under voltage lockout hysteresis Rising to falling threshold Rising to falling threshold 200 mV
V(UVLO_IN) VCC_IN under voltage lockout (No LDO option) VCC_IN falling; NFAULT = Hi-Z 2.3 V
VCC_IN rising; NFAULT = LOW 2.5 V
V(UVLO_IN,HYS) VCC_IN under voltage hysteresis (No LDO option) Rising to falling threshold 190 mV
T(WRN) Thermal warning Die temperature TJ 125 °C
T(SDN) Thermal shutdown 150 160 °C
T(HYS) Hysteresis for thermal shutdown and warning thresholds 14 °C
IREV Leakage current in reverse polarity EN=LOW, IN=x; V(OUT) < V(GND) or V(OUT) > V(VCC), up to |36 V| 60 µA
EN=LOW, IN=x; V(OUT) < V(GND) or V(OUT) > V(VCC), up to |55 V| 110 µA
EN = HIGH, IN = LOW; V(OUT to VCC) = 3 V 640 µA
EN = HIGH, IN = HIGH; V(OUT to GND) = -3 V 10 µA
LINEAR REGULATOR (LDO)
V(VCC_OUT) Voltage regulator output 5 V LDO version 4.75 5 5.25 V
3.3 V LDO version 3.13 3.3 3.46 V
V(DROP) Voltage regulator drop-out voltage
(V(VCC) – V(VCC_OUT))		 ICC = 20 mA load current 5 V LDO  1.9 V
3.3 V LDO 1.4 V
REG Line regulation (dV(VCC_OUT)/dV(VCC)) I(VCC_OUT) = 1 mA 1.7 mV/V
LREG Load regulation (dV(VCC_OUT)/V(VCC_OUT)) V(VCC) = 24 V, I(VCC_OUT) = 100 µA to 20 mA 1%
PSSR Power Supply Rejection Ratio 100 kHz, I(VCC_OUT) = 20 mA 40 dB
(1) Current fault indication will be active. Current fault auto recovery will be de-activated.
(2) If operating continuously with this current limit, ensure that the current through the device does not cause the TJ to be greater than T(SDN) for a given ambient temperature and thermal property of the system. For pulse durations t < 200 µs, the device can source or sink current of at least 500 mA across the recommended operating conditions.