JAJSKR4B december   2020  – february 2023 TPS22950

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Current Limiting (TPS22950, TPS22950C)
      2. 9.3.2 Current Limiting (TPS22950L)
      3. 9.3.3 Adjusting the Current Limit
      4. 9.3.4 Reverse Current Blocking (TPS22950, TPS22950C)
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  12. 12Mechanical, Packaging, and Orderable Information

9.3.4 Reverse Current Blocking (TPS22950, TPS22950C)

In a scenario where the device is enabled and VOUT is greater than VIN, there is potential for reverse current to flow through the pass FET or the body diode. When the reverse current threshold is exceeded (about 900 mA), there is a delay time (tRCB) before the switch turns off to stop the current flow. The switch remains off and block reverse current as long as the reverse voltage condition exists. After VOUT has dropped below the release voltage threshold (VRCB) the device turns back on. When the ON pin is pulled low, the device constantly blocks reverse current.