JAJSL23B January   2021  – January 2022 TPS785-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Foldback Current Limit
      2. 7.3.2 Output Enable
      3. 7.3.3 Active Discharge
      4. 7.3.4 Undervoltage Lockout (UVLO) Operation
      5. 7.3.5 Dropout Voltage
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Adjustable Device Feedback Resistors
      4. 8.1.4 Load Transient Response
      5. 8.1.5 Exiting Dropout
      6. 8.1.6 Dropout Voltage
      7. 8.1.7 Reverse Current
      8. 8.1.8 Feed-Forward Capacitor (CFF)
      9. 8.1.9 Power Dissipation (PD)
        1. 8.1.9.1 Estimating Junction Temperature
        2. 8.1.9.2 Recommended Area for Continuous Operation
        3. 8.1.9.3 Power Dissipation versus Ambient Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Additional Layout Considerations
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

GUID-C32BD759-2557-4108-948E-A38CE01CB709-low.gifFigure 5-1 DRB Package (Fixed),8-Pin VSON(Top View)
Figure 5-3 DRB Package (Fixed) B Version,8-Pin VSON(Top View)
Figure 5-5 KVU Package (Fixed),5-Pin TO-252(Top View)
GUID-1504D833-D6BA-4384-BCBE-3825F640C4DE-low.gifFigure 5-2 DRB Package (Adjustable),8-Pin VSON(Top View)
Figure 5-4 DRB Package (Adjustable) B Version,8-Pin VSON(Top View)
Figure 5-6 KVU Package (Adjustable),5-Pin TO-252(Top View)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME DRB (Fixed) DRB (Adjustable) DRB (Fixed) B Version DRB (Adjustable) B Version KVU (Fixed) KVU (Adjustable)
EN 7 7 6 6 1 1 Input Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. Do not float this pin. If not used, connect EN to IN.
FB — 2 — 2 — 5 Input Feedback pin. Input to the control-loop error amplifier. This pin is used to set the output voltage of the device with the use of external resistors. Do not float this pin. For adjustable-voltage version devices only.
GND 5 5 5 5 3 3 — Ground pin. This pin must be connected to ground on the board.
IN 8 8 8 8 2 2 Input Input pin. For best performance, place the nominal recommended value or larger ceramic capacitor from IN to GND; see the Recommended Operating Conditions table. Place the input capacitor as close to the input of the device as possible.
NC 2, 3, 4, 6 3, 4, 6 2, 3, 4, 7 3, 4, 7 5 — — No connect pin. This pin is not internally connected. Connect to ground for best thermal performance or leave floating.
OUT 1 1 1 1 4 4 Output A 0.47-µF or greater effective capacitance is required from OUT to ground for stability. For best transient response, use a 1-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to output of the device as possible; see the Recommended Operating Conditions table.
Thermal Pad Pad Pad Pad Pad Pad Pad — The thermal pad is electrically connected to the GND pin. Connect the thermal pad to a large-area GND plane for improved thermal performance.