JAJSL99 August   2021 TPS1653

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Hot Plug-In and In-Rush Current Control
        1. 8.3.1.1 Thermal Regulation Loop
      2. 8.3.2  Undervoltage Lockout (UVLO)
      3. 8.3.3  Overload and Short Circuit Protection
        1. 8.3.3.1 Overload Protection
        2. 8.3.3.2 Short Circuit Protection
          1. 8.3.3.2.1 Start-Up With Short-Circuit On Output
      4. 8.3.4  Current Monitoring Output (IMON)
      5. 8.3.5  FAULT Response (FLT)
      6. 8.3.6  Power Good Output (PGOOD)
      7. 8.3.7  IN, P_IN, OUT and GND Pins
      8. 8.3.8  Thermal Shutdown
      9. 8.3.9  Low Current Shutdown Control (SHDN)
      10. 8.3.10 Enable Input (EN)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 9.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 9.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 9.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 48-V Power Amplifier Protection for Telecom Radios
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

8.3.5 FAULT Response (FLT)

The FLT open-drain output asserts (active low) under the faults events such as undervoltage, overload, current limiting, ILIM pin short and thermal shutdown conditions. The device is designed to eliminate false reporting by using an internal "de-glitch" circuit for fault conditions without the need for an external circuitry. FLT can be left open or connected to GND when not used.