JAJSLF9B December   2015  – March 2021 LMR16030

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Control
      2. 7.3.2  Slope Compensation
      3. 7.3.3  Sleep Mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Adjustable Output Voltage
      6. 7.3.6  Enable and Adjustable Undervoltage Lockout
      7. 7.3.7  External Soft Start
      8. 7.3.8  Switching Frequency and Synchronization (RT/SYNC)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Overcurrent and Short Circuit Protection
      11. 7.3.11 Overvoltage Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Set-Point
        3. 8.2.2.3 Switching Frequency
        4. 8.2.2.4 Output Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Schottky Diode Selection
        7. 8.2.2.7 Input Capacitor Selection
        8. 8.2.2.8 Bootstrap Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

GUID-121EEE26-322E-411B-A36C-6D4FC49A720D-low.gif Figure 5-1 8-Pin (HSOIC)DDA Package(Top View)
Table 5-1 Pin Functions
PIN TYPE (1) DESCRIPTION
NAME NO.
BOOT 1 P Bootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1-μF capacitor from BOOT to SW.
VIN 2 P Connect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and GND must be as short as possible.
EN 3 A Enable pin with internal pullup current source. Pull below 1.2 V to disable. Float or connect to VIN to enable. Adjust the input undervoltage lockout with two resistors. See Section 7.3.6.
RT/SYNC 4 A Resistor Timing or External Clock input. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the operating mode returns to frequency programming by resistor.
FB 5 A Feedback input pin. Connect to the feedback divider to set VOUT. Do not short this pin to ground during operation.
SS
or
PGOOD		 6 A SS pin for soft-start version. Connect to a capacitor to set soft-start time.
PGOOD pin for Power Good version, open drain output for power-good flag. Use a 10-kΩ to 100-kΩ pullup resistor to logic rail or other DC voltage no higher than 7 V.
GND 7 G System ground pin
SW 8 P Switching output of the regulator. Internally connected to high-side power MOSFET. Connect to power inductor.
Thermal Pad 9 G Major heat dissipation path of the die. Must be connected to ground plane on PCB.
(1) A = Analog, P = Power, G = Ground