JAJSLI4A May   2021  – December 2021 ISOW1044

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  ThermalInformation
    5. 8.5  Power Ratings
    6. 8.6  Insulation Specifications
    7. 8.7  Safety-Related Certifications
    8. 8.8  Safety Limiting Values
    9. 8.9  Electrical Characteristics
    10. 8.10 Supply Current Characteristics
    11. 8.11 Switching Characteristics
    12. 8.12 Insulation Characteristics Curves
    13. 8.13 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Power Isolation
    3. 10.3 Signal Isolation
    4. 10.4 CAN Transceiver
      1. 10.4.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
    5. 10.5 Functional Block Diagram
    6. 10.6 Feature Description
      1. 10.6.1 CAN Bus States
      2. 10.6.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 10.6.3 TXD Dominant Timeout (DTO)
      4. 10.6.4 Power-Up and Power-Down Behavior
      5. 10.6.5 Protection Features
      6. 10.6.6 Floating Pins, Unpowered Device
      7. 10.6.7 Glitch-Free Power Up and Power Down
    7. 10.7 Device Functional Modes
    8. 10.8 Device I/O Schematics
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
        2. 11.2.2.2 CAN Termination
      3. 11.2.3 Application Curve
      4. 11.2.4 Insulation Lifetime
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 サポート・リソース
    4. 14.4 Trademarks
    5. 14.5 静電気放電に関する注意事項
    6. 14.6 用語集
  15. 15Mechanical, Packaging, and Orderable Information

Protection Features

The ISOW1044 device has multiple protection features to create a robust system level solution.

  • The first feature is an Enable/Fault protection feature. This EN/FLT pin can be used as either an input pin to enable or disable the integrated DC-DC power converter or as an output pin which works as an alert signal if the power converter is not operating properly. In the /Fault use case, a fault is reported if VDD > 7 V, VDD < 2.5 V, or if the junction temperature >170°C. When a fault is detected, this pin will go low, disabling the DC-DC converter to prevent any damage.

    GUID-20211206-SS0I-D65V-TBDJ-0F7S8PBRGG6L-low.svg Figure 10-7 EN Fault Pin Diagram

  • An over-voltage clamp feature is present on VISOOUT which will clamp the voltage at 6 V if there is an increase in voltage seen. For device reliability, it is recommended that VISOOUT stays lower than the over-clamp voltage for device reliability.

  • Over-Voltage Lock Out (OVLO) on VDD will occur when a voltage higher than 7 V on VDD is seen. At OVLO, the device will go into a low power state and the EN/FLT pin will go low.

  • In cases of overload or short on power converter output VISOOUT, maximum duty cycle of power converter is limited. In cases of driver bus short circuit due to the external power supply cable shorting to the bus cable, short circuit current protection on CAN chip restricts the bus current to ±115 mA maximum.
  • Thermal protection is also integrated to help prevent the device from getting damaged under such scenarios. An increase in the die temperature is monitored and the device is disabled when the die temperature becomes 165 ℃ (typical), thus disabling the short condition. The device is re-enabled when the junction temperature becomes 155 ℃ (typical). If an overload or output short-circuit condition prevails, this protection cycle is repeated. Care should be taken in the system design to prevent repeated or prolonged exposure to bus shorts as this exposes the device to high junction temperatures for extreme amounts of time affecting device reliability.