JAJSLI4A May   2021  – December 2021 ISOW1044

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  ThermalInformation
    5. 8.5  Power Ratings
    6. 8.6  Insulation Specifications
    7. 8.7  Safety-Related Certifications
    8. 8.8  Safety Limiting Values
    9. 8.9  Electrical Characteristics
    10. 8.10 Supply Current Characteristics
    11. 8.11 Switching Characteristics
    12. 8.12 Insulation Characteristics Curves
    13. 8.13 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Power Isolation
    3. 10.3 Signal Isolation
    4. 10.4 CAN Transceiver
      1. 10.4.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
    5. 10.5 Functional Block Diagram
    6. 10.6 Feature Description
      1. 10.6.1 CAN Bus States
      2. 10.6.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 10.6.3 TXD Dominant Timeout (DTO)
      4. 10.6.4 Power-Up and Power-Down Behavior
      5. 10.6.5 Protection Features
      6. 10.6.6 Floating Pins, Unpowered Device
      7. 10.6.7 Glitch-Free Power Up and Power Down
    7. 10.7 Device Functional Modes
    8. 10.8 Device I/O Schematics
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
        2. 11.2.2.2 CAN Termination
      3. 11.2.3 Application Curve
      4. 11.2.4 Insulation Lifetime
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 サポート・リソース
    4. 14.4 Trademarks
    5. 14.5 静電気放電に関する注意事項
    6. 14.6 用語集
  15. 15Mechanical, Packaging, and Orderable Information

8.6 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest terminal-to-terminal distance through air >8 mm
CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface >8 mm
DTI Distance through the insulation Minimum internal gap (internal clearance – capacitive signal isolation) >17 um
DTI Distance through the insulation Minimum internal gap (internal clearance- transformer power isolation) >120 um
CTI Comparative tracking index IEC 60112; UL 746A >600 V
Material group According to IEC 60664-1 I
Overvoltage Category Rated mains voltage ≤ 600 VRMS I-IV
Rated mains voltage ≤ 1000 VRMS I-III
DIN VDE V 0884-11:2017-01(2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1500 VPK
VIOWM Maximum working isolation voltage AC voltage (sine wave) Time dependent dielectric breakdown (TDDB) test 1000 VRMS
DC voltage 1500
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60s (qualification);
VTEST = 1.2 × VIOTM, t = 1s (100% production)		 7071 VPK
VIOSM Maximum surge isolation voltage ISOW1044(3) Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM = 10000 VPK (qualification)		 6250 VPK
VIOSM Maximum surge isolation voltage ISOW1044B(3) Test method per IEC 62368-1, 1.2/50 µs waveform,
VTEST = 1.3 × VIOSM = 7800 VPK (qualification)		 6000 VPK
qpd Apparent charge(4) Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 × VIORM , tm = 10 s		 ≤5 pC
Method a: After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
ISOW1044: Vpd(m) = 1.6 × VIORM, tm = 10 s. ISOW1044B: Vpd(m) = 1.2 × VIORM, tm = 10 s		 ≤5
Method b1: At routine test (100% production) and preconditioning (type test)
Vini = 1.2 × VIOTM, tini = 1 s;
ISOW1044: Vpd(m) = 1.875 × VIORM, tm = 1 s.                        ISOW1044B: Vpd(m) = 1.5 × VIORM, tm = 1 s		 ≤5
CIO Barrier capacitance, input to output(5) VIO = 0.4 sin (2πft), f = 1 MHz ~3.5 pF
RIO Isolation resistance, input to output(5) VIO = 500 V, TA = 25°C > 1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C > 1011 Ω
VIO = 500 V at TS = 150°C > 109 Ω
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 × VISO , t = 1 s (100% production) 5000 VRMS
(1) Creepage and clearance requirements should be applied accordingto the specific equipment isolation standards of an application. Care should be taken to maintainthe creepage and clearance distance of a board design to ensure that the mounting pads of theisolator on the printed-circuit board do not reduce this distance. Creepage and clearance on aprinted-circuit board become equal in certain cases. Techniques such as inserting grooves and/orribs on a printed circuit board are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation (ISOW1044) and basic electrical insulation (ISOW1044B) only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air or oil to determine the intrinsicsurge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partialdischarge (pd).
(5) All pins on each side of the barrier tied together creating atwo-terminal device