JAJSLJ6C november   2020  – august 2023 UCC25800-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Management
      2. 8.3.2 Oscillator
      3. 8.3.3 External Synchronization
      4. 8.3.4 Dead-Time
        1. 8.3.4.1 Adaptive Dead-time
        2. 8.3.4.2 Maximum Programmable Dead-time
      5. 8.3.5 Protections
        1. 8.3.5.1 Overcurrent Protection
          1. 8.3.5.1.1 OCP Threshold Setting
          2. 8.3.5.1.2 Output Power Capability
        2. 8.3.5.2 Input Overvoltage Protection (OVP)
        3. 8.3.5.3 Over-Temperature Protection (TSD)
        4. 8.3.5.4 Pin-Fault Protections
        5. 8.3.5.5 VREG Pin Protection
      6. 8.3.6 DIS/FLT Pin operation
        1. 8.3.6.1 FAULT Codes
    4. 8.4 Device Functional Modes
      1. 8.4.1 UVLO Mode
      2. 8.4.2 Soft-start Mode
      3. 8.4.3 Normal Operation Mode
      4. 8.4.4 Disabled Mode
      5. 8.4.5 Fault Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 LLC Converter Operation Principle
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 What to Do and What Not to Do
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

Typical Application

In the automotive traction inverters or on-board chargers, a regulated bus voltage is often generated from the 12-V battery and then processed by the isolated bias supplies to provide the gate driver bias power for the inverter switches, as shown in Figure 9-1. The isolated bias supply can be used to bias the high-side drivers or low-side drivers, to provide the isolation for function, safety, or noise immunity.

GUID-21600C75-9B83-4511-BC96-A5EBDAB4EA43-low.svg Figure 9-1 Gate driver bias supply example for automotive traction inverter

When the isolated based bias supply used in the inverter applications, especially for the high side switches, the high dv/dt on the inverter switch-node can couple through the bias supply transformer and causes extra EMI noise, as demonstrated in Figure 9-2.

GUID-D8EDC131-26BE-401E-A008-2CAC9F1C5C53-low.svg Figure 9-2 Noise coupling path from inverter power stage to isolated bias supply

Given the high dv/dt is caused by the inverter power stage, to minimize this noise coupling, it is desired to minimize the transformer primary side to secondary side parasitic capacitor (inter-winding capacitor) CPS. Popular topologies, such as Flyback or Push-pull, require the minimum leakage inductance to improve the efficiency, reduce the voltage and current stress, as well as minimize the noise created by the converter. In turn, this type of transformers suffer from larger inter-winding capacitance. When they are used in the gate driver bias supply applications, the high dv/dt from the inverter power stage could be coupled through the transformer inter-winding capacitor to the low-voltage side. This creates a much severe EMI noise issue. Instead, the LLC topology utilizes the transformer leakage inductance as its resonant component, allowing the converter to use a transformer with larger leakage inductance but much smaller inter-winding capacitance. This results in less system EMI noise challenges.