JAJSLJ8 March   2021 TPSM13604H

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 COT Control Circuit Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Overvoltage Comparator
      2. 7.3.2 Current Limit
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Zero Coil Current Detection
      5. 7.3.5 Prebiased Start-up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Steps for the TPSM13604 Application
          1. 8.2.2.1.1 Enable Divider, RENT, and RENB Selection
          2. 8.2.2.1.2 Output Voltage Selection
          3. 8.2.2.1.3 Soft-Start Capacitor, CSS, Selection
          4. 8.2.2.1.4 Output Capacitor, CO, Selection
            1. 8.2.2.1.4.1 Capacitance
            2. 8.2.2.1.4.2 ESR
          5. 8.2.2.1.5 Input Capacitor, CIN, Selection
          6. 8.2.2.1.6 ON-Time, RON, Resistor Selection
            1. 8.2.2.1.6.1 Discontinuous Conduction and Continuous Conduction Mode Selection
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Module SMT Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Power Dissipation and Board Thermal Requirements
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 用語集
    7. 11.7 静電気放電に関する注意事項
  12. 12Mechanical, Packaging, and Orderable Information

7.3.2 Current Limit

Current limit detection is carried out during the off-time by monitoring the current in the synchronous MOSFET. Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows through the load, the PGND pin, and the internal synchronous MOSFET. If this current exceeds 4.2 A (typical), the current limit comparator disables the start of the next on-time period. The next switching cycle only occurs if the FB input is less than 0.8 V and the valley of the inductor current has decreased below 4.2 A. Inductor current is monitored during the period of time the synchronous MOSFET is conducting. So long as inductor current exceeds 4.2 A, further on-time intervals for the top MOSFET do not occur. Switching frequency is lower during current limit due to the longer off-time.

Note:

The DC current limit varies with duty cycle, switching frequency, and temperature.