JAJSLK0B march   2021  – june 2023 TMUX7462F

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Electrical Characteristics (Global)
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics
    7. 6.7  ±20 V Dual Supply: Electrical Characteristics
    8. 6.8  12 V Single Supply: Electrical Characteristics
    9. 6.9  36 V Single Supply: Electrical Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  On-Leakage Current
    3. 7.3  Input and Output Leakage Current under Overvoltage Fault
    4. 7.4  Fault Response Time
    5. 7.5  Fault Recovery Time
    6. 7.6  Fault Flag Response Time
    7. 7.7  Fault Flag Recovery Time
    8. 7.8  Fault Drain Enable Time
    9. 7.9  Inter-Channel Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 THD + Noise
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flat ON-Resistance
      2. 8.3.2 Protection Features
        1. 8.3.2.1 Input Voltage Tolerance
        2. 8.3.2.2 Powered-Off Protection
        3. 8.3.2.3 Fail-Safe Logic
        4. 8.3.2.4 Overvoltage Protection and Detection
        5. 8.3.2.5 Latch-Up Immunity
        6. 8.3.2.6 EMC Protection
      3. 8.3.3 Overvoltage Fault Flags
      4. 8.3.4 Bidirectional Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Fault Mode
      3. 8.4.3 Truth Table
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

8.3.2.3 Fail-Safe Logic

Fail-Safe logic circuitry allows voltages on the control input pin (DR) to be applied before the supply pins. This eliminates the need for power sequencing of the logic signals and protects the device from potential damage. The control inputs are protected against positive faults of up to +44 V in the powered-off condition, but do not offer protection against a negative overvoltage condition.