JAJSM66A
June 2021 – December 2021
LM74701-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Voltage
8.3.2
Charge Pump
8.3.3
Gate Driver
8.3.4
Enable
8.3.5
Battery Voltage Monitoring (SW)
8.4
Device Functional Modes
8.4.1
Shutdown Mode
8.4.2
Conduction Mode
8.4.2.1
Regulated Conduction Mode
8.4.2.2
Full Conduction Mode
8.4.2.3
VDS Clamp Mode
8.4.3
Reverse Current Protection Mode
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Design Considerations
9.2.2.2
MOSFET Selection
9.2.2.3
Charge Pump VCAP (CVCAP) and Input Capacitance (CIN)
9.2.2.4
Output Capacitance (COUT)
9.2.3
Application Curves
9.3
What to Do and What Not to Do
9.4
OR-ing Application Configuration
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
サポート・リソース
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
9.2.3
Application Curves
Figure 9-4
ISO 7637-2 Pulse 1
Time (100 µs/DIV)
Figure 9-6
Response to ISO 7637-2 Pulse 2A (+112 V)
Time (20 ms/DIV)
Figure 9-8
Response to ISO 16750 Pulse 5B (35-V Suppressed Load Dump)
Time (10 ms/DIV)
Figure 9-10
Startup With 3-A Load
Time (1 ms/DIV)
Figure 9-5
Response to ISO 7637-2 Pulse 1 (–100 V)
Time (200 ms/DIV)
Figure 9-7
Response to ISO 7637-2 Pulse 2B
Time (40 µs/DIV)
Figure 9-9
Response to LV124 E-10 (Input Micro Short, 100 μs)
Time (10 ms/DIV)
Figure 9-11
Startup With 6-A Load