JAJSMQ5A October 2017 – June 2022 LMT86-Q1
PRODUCTION DATA
The LMT86-Q1 device is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of VDD and VOUT. The shift typically occurs when VDD – VOUT = 1 V.
This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VOUT. Because the shift takes place over a wide temperature change of 5°C to 20°C, VOUT is always monotonic. The accuracy specifications in the Accuracy Characteristics table already include this possible shift.