JAJSNC1F September   2006  – January 2022 BQ2022A

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: DC
    6. 6.6 Switching Characteristics: AC
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 1024-Bit EPROM
      2. 7.3.2 EPROM Status Memory
      3. 7.3.3 Error Checking
      4. 7.3.4 Customizing the BQ2022A
      5. 7.3.5 Bus Termination
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1  Serial Communication
      2. 7.5.2  Initialization
      3. 7.5.3  ROM Commands
        1. 7.5.3.1 READ ROM Command
        2. 7.5.3.2 SKIP ROM Command
      4. 7.5.4  Memory/Status Function Commands
      5. 7.5.5  READ MEMORY Commands
        1. 7.5.5.1 READ MEMORY/Page CRC
        2. 7.5.5.2 READ MEMORY/Field CRC
      6. 7.5.6  WRITE MEMORY Command
      7. 7.5.7  READ STATUS Command
      8. 7.5.8  WRITE STATUS Command
      9. 7.5.9  PROGRAM PROFILE Byte
      10. 7.5.10 SDQ Signaling
      11. 7.5.11 RESET and PRESENCE PULSE
      12. 7.5.12 WRITE Bit
      13. 7.5.13 READ Bit
      14. 7.5.14 PROGRAM PULSE
      15. 7.5.15 IDLE
      16. 7.5.16 CRC Generation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming Circuit Example
        2. 8.2.2.2 SDQ Master Best Practices
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
      2. 11.2.2 Receiving Notification of Documentation Updates
    3. 11.3 Trademarks
    4. 11.4 サポート・リソース
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.5.6 WRITE MEMORY Command

The WRITE MEMORY command is used to program the 1024-bit EPROM memory field. The 1024-bit memory field is programmed in 8-byte segments. Data is first written into an 8-byte RAM buffer one byte at a time. The contents of the RAM buffer is then ANDed with the contents of the EPROM memory field when the programming command is issued.

Figure 7-5 illustrates the sequence of events for programming the EPROM memory field. After issuing a SKIP ROM command, the host issues the WRITE MEMORY command, 0Fh, followed by the low byte and then the high byte of the starting address. The BQ2022A calculates and transmits an 8-bit CRC based on the WRITE command and address.

If at any time during the WRITE MEMORY process, the CRC read by the host is incorrect, a reset pulse must be issued, and the entire sequence must be repeated.

After the BQ2022A transmits the CRC, the host then transmits 8 bytes of data to the BQ2022A. Another 8-bit CRC is calculated and transmitted based on the 8 bytes of data. If this CRC agrees with the CRC calculated by the host, the host transmits the program command 5Ah and then applies the programming voltage for at least 2500 μs or tEPROG. The contents of the RAM buffer is then logically ANDed with the contents of the 8-byte EPROM offset by the starting address.

The starting address can be any integer multiple of eight between 0000 and 007F (hex) such as 0000, 0008, and 0010 (hex).

The WRITE DATA MEMORY command sequence can be terminated at any point by issuing a reset pulse except during the program pulse period tPROG.

Note:

The BQ2022A responds with the data from the selected EPROM address sent least significant-bit first. This response should be checked to verify the programmed byte. If the programmed byte is incorrect, then the host must reset the part and begin the write sequence again.

For both of these cases, the decision to continue programming is made entirely by the host, because the BQ2022A is not able to determine if the 8-bit CRC calculated by the host agrees with the 8-bit CRC calculated by the BQ2022A.

Prior to programming, bits in the 1024-bit EPROM data field appear as logical 1 s.

GUID-57F225D8-BA3F-47F8-AA2E-8992D82A15D3-low.gifFigure 7-5 WRITE MEMORY Command Flow