The UCC25660x ファミリ implements a VCR Synthesizer which integrates the resonant tank current to form a internal representation of the resonant capacitor voltage. By implementing the VCR synthesizer internally, the UCC25660x ファミリ provides for an ability to support very high frequency startup with controlled inrush currents and feed forward gain stage. The internal VCR synthesizer also makes the controller less succeptible to external noise picked up on the ISNS pin, making the controller more robust.

The first stage of the VCR synthesizer consists of a programable gain stage, used to implement the input voltage feed forward function. The second stage consist of a programable integrator with ramp compensation.

The UCC256604 has extended gain range enabled. This extended gain range helps to reduce the FBReplica variation when input voltage of the LLC changed over a wide range (3:1). This is achieved by reducing the gain of the programmable gain stage of the VCR synthesizer by turning on the Wide LLC EN bit.

To accommodate a wide frequency range of LLC power stages, the time constant of the integrator is externally configurable at startup to meet the needs of the design using the TSET pin. A voltage resistor divider between V5P and GNDP, connecting to TSET pin, configures the TSET settings. The UCC25660x ファミリ detected the divider ratio during startup. Based on the divider ratio, not only the time constant but the OCP threshold can be choosen. Once the time constant is chosen, the maximum dead-time is also configured. The column 2 in the tabled indicates the minimum frequency upto which the IPPC operation is maintained. Once the frequency falls below this, the controller can still maintian closed loop operation and works as a conventional current mode control.

In the table value TSET voltage values indicated are nominal values. Maximum and minimum range that can be used for each TSET setting is within +/- 48mV.