JAJSOO3B October   2014  – October 2024 TMP75B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Temperature Limits and Alert
      3. 7.3.3 Serial Interface
        1. 7.3.3.1  Bus Overview
        2. 7.3.3.2  Serial Bus Address
        3. 7.3.3.3  Writing and Reading Operation
        4. 7.3.3.4  Target-Mode Operations
          1. 7.3.3.4.1 Target Receiver Mode:
          2. 7.3.3.4.2 Target Transmitter Mode:
        5. 7.3.3.5  SMBus Alert Function
        6. 7.3.3.6  General Call
        7. 7.3.3.7  High-Speed (Hs) Mode
        8. 7.3.3.8  Timeout Function
        9. 7.3.3.9  Two-Wire Timing
        10. 7.3.3.10 Two-Wire Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous-Conversion Mode
      2. 7.4.2 Shutdown Mode
      3. 7.4.3 One-Shot Mode
    5. 7.5 Programming
  9. 8 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power-Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

9.2.1 Design Requirements

The TMP75B-Q1 only requires pullup resistors on SDA and ALERT, although a pullup resistor is typically present on the SCL as well. A 0.01μF bypass capacitor on the supply is recommended, as shown in Figure 9-1. The SCL, SDA, and ALERT lines can be pulled up to a supply that is equal to or higher than VS through the pullup resistors. To configure one of eight different addresses on the bus, connect A0, A1, and A2 to either VS or GND.