JAJSPO2D June   2010  – October 2024 TLV320AIC3104-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics I2S/LJF/RJF Timing in Master Mode
    7. 6.7  Switching Characteristics I2S/LJF/RJF Timing in Slave Mode
    8. 6.8  Switching Characteristics DSP Timing in Master Mode
    9. 6.9  Switching Characteristics DSP Timing in Slave Mode
    10. 6.10 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Audio Data Converters
      2. 7.3.2  Stereo Audio ADC
        1. 7.3.2.1 Stereo Audio ADC High-Pass Filter
      3. 7.3.3  Automatic Gain Control (AGC)
      4. 7.3.4  Stereo Audio DAC
      5. 7.3.5  Digital Audio Processing for Playback
      6. 7.3.6  Digital Interpolation Filter
      7. 7.3.7  Delta-Sigma Audio DAC
      8. 7.3.8  Audio DAC Digital Volume Control
      9. 7.3.9  Analog Output Common-mode Adjustment
      10. 7.3.10 Audio DAC Power Control
      11. 7.3.11 Audio Analog Inputs
      12. 7.3.12 Analog Input Bypass Path Functionality
      13. 7.3.13 ADC PGA Signal Bypass Path Functionality
      14. 7.3.14 Input Impedance and VCM Control
      15. 7.3.15 MICBIAS Generation
      16. 7.3.16 Analog Fully Differential Line Output Drivers
      17. 7.3.17 Analog High-Power Output Drivers
      18. 7.3.18 Short-Circuit Output Protection
      19. 7.3.19 Jack and Headset Detection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Digital Audio Processing for Record Path
      2. 7.4.2 Increasing DAC Dynamic Range
      3. 7.4.3 Passive Analog Bypass During Power Down
      4. 7.4.4 Hardware Reset
    5. 7.5 Programming
      1. 7.5.1  Digital Control Serial Interface
      2. 7.5.2  I2C Control Interface
      3. 7.5.3  I2C Bus Debug in a Glitched System
      4. 7.5.4  Digital Audio Data Serial Interface
      5. 7.5.5  Right-Justified Mode
      6. 7.5.6  Left-Justified Mode
      7. 7.5.7  I2S Mode
      8. 7.5.8  DSP Mode
      9. 7.5.9  TDM Data Transfer
      10. 7.5.10 Audio Clock Generation
  9. 8 Register Maps
    1. 8.1 Output Stage Volume Controls
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 External Speaker Driver in Infotainment and Cluster Applications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 External Speaker Amplifier With Separate Line Outputs
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.3.5 Digital Audio Processing for Playback

The DAC channel consists of optional filters for de-emphasis and bass, treble, midrange level adjustment, speaker equalization, and 3D effects processing. The de-emphasis function is implemented by a programmable digital filter block with fully programmable coefficients (see page 1, registers 21 to 26 for the left channel and page 1, registers 47 to 52 for the right channel). If de-emphasis is not required in a particular application, this programmable filter block can be used for some other purpose. The de-emphasis filter transfer function is given by:

Equation 2. TLV320AIC3104-Q1

where the N0, N1, and D1 coefficients are fully programmable individually for each channel. The coefficients that should be loaded to implement standard de-emphasis filters are given in Table 7-2

Table 7-2 De-Emphasis Coefficients for Common Audio Sampling Rates
SAMPLING FREQUENCYN0N1D1
32 kHz16,950–1,22017,037
44.1 kHz15,091–2,87720,555
48 kHz(1)14,677–3,28321,374
(1) The 48-kHz coefficients listed in Table 7-2 are used as defaults.

In addition to the de-emphasis filter block, the DAC d