JAJSQ81F December   2015  – December 2023 TUSB542

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics, Power Supply Currents
    6. 5.6  Electrical Characteristics, DC
    7. 5.7  Electrical Characteristics, Dynamic
    8. 5.8  Electrical Characteristics, AC
    9. 5.9  Timing Requirements
    10. 5.10 Switching Characteristics
    11. 5.11 Typical Characteristics
      1. 5.11.1 1-Inch Pre Channel
      2. 5.11.2 24-Inch Pre Channel
      3. 5.11.3 32-Inch Pre Channel
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Receiver Equalization
      2. 6.3.2 De-Emphasis Control and Output Swing
      3. 6.3.3 Automatic LFPS Detection
      4. 6.3.4 Automatic Power Management
    4. 6.4 Device Functional Modes
      1. 6.4.1 Disconnect Mode
      2. 6.4.2 U Modes
        1. 6.4.2.1 U0 Mode
        2. 6.4.2.2 U2/U3 Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications, USB Type-C Port SS MUX
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Typical Application: Switching USB SS Host or Device Ports
      1. 7.3.1 Design Requirements
      2. 7.3.2 Detailed Design Procedure
      3. 7.3.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.3.1 Design Requirements

For this design example, use the design parameters shown in Design Parameters.

The configured value depends on the physical channel (PCB layout) Equalization 0, 3, 6, 9dB (5Gbps) The configured value depends on the physical channel (PCB layout) de-emphasis 0, –3.5, –6dB The configured value depends on the physical channel (PCB layout) Differential impedance 72 - 120 Ω

Table 7-2 Design Parameters
PARAMETERVALUECOMMENT
VDD181.8V
AC Coupling Capacitors for SS signals100 nF75-200 nF range allowed.
TUSB542 biases both input and output common mode voltage, hence ac-coupling caps as required on both sides.
Note: TX pairs need to be biased at the connector.
Pull-up/down resistor to control CNF pins4.7kΩ
Input voltage range100 mV to 1200 mV
Output voltage range900 mV to 1100 mV