JAJSR60F
August 2008 – June 2020
TPS40210-Q1
,
TPS40211-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
5
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Minimum On-Time and Off-Time Considerations
7.3.2
Current Sense and Overcurrent
7.3.3
Current Sense and Subharmonic Instability
7.3.4
Current Sense Filtering
7.3.5
Soft Start
7.3.6
BP Regulator
7.3.7
Shutdown (DIS/ EN Pin)
7.3.8
Control Loop Considerations
7.3.9
Gate Drive Circuit
7.3.10
TPS40211-Q1
7.4
Device Functional Modes
7.4.1
Setting the Oscillator Frequency
7.4.2
Synchronizing the Oscillator
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Duty Cycle Estimation
8.2.2.2
Inductor Selection
8.2.2.3
Rectifier Diode Selection
8.2.2.4
Output Capacitor Selection
8.2.2.5
Input Capacitor Selection
8.2.2.6
Current Sense and Current Limit
8.2.2.7
Current Sense Filter
8.2.2.8
Switching MOSFET Selection
8.2.2.9
Feedback Divider Resistors
8.2.2.10
Error Amplifier Compensation
8.2.2.11
R-C Oscillator
8.2.2.12
Soft-Start Capacitor
8.2.2.13
Regulator Bypass
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
サード・パーティ製品に関する免責事項
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Related Links
11.4
ドキュメントの更新通知を受け取る方法
11.5
サポート・リソース
11.6
Trademarks
11.7
静電気放電に関する注意事項
11.8
用語集
12
Mechanical, Packaging, and Orderable Information
70
7.2
Functional Block Diagram