JAJSS43 August   2024 AMC3306M25-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications 
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagrams
    12. 5.12 Insulation Characteristics Curves
    13. 5.13 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Modulator
      3. 6.3.3 Isolation Channel Signal Transmission
      4. 6.3.4 Digital Output
        1. 6.3.4.1 Output Behavior in Case of a Full-Scale Input
        2. 6.3.4.2 Output Behavior in Case of a High-Side Supply Failure
      5. 6.3.5 Isolated DC/DC Converter
      6. 6.3.6 Diagnostic Output
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Digital Filter Usage
    2. 7.2 Typical Application
      1. 7.2.1 Onboard Charger (OBC) Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Shunt Resistor Sizing
          2. 7.2.1.2.2 Input Filter Design
          3. 7.2.1.2.3 Bitstream Filtering
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Best Design Practices
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
Input Filter Design

Place an RC filter in front of a ΔΣ modulator to improve signal-to-noise performance of the signal path. Design the input filter such that:

  • The cutoff frequency of the filter is at least one order of magnitude lower than the sampling frequency of the ΔΣ modulator (fCLKIN)
  • The input bias current does not generate significant voltage drop across the DC impedance of the input filter
  • The impedances measured from the analog inputs are equal (R1 equals R2)

Capacitors C11 and C12 are optional and improve common-mode rejection at high frequencies (>1MHz). For best performance, make sure C11 matches the value of C12 and that both capacitors are 10 to 20 times lower in value than C10. For most applications, the structure shown in Figure 7-2 achieves excellent performance.

AMC3306M25-Q1 Differential Input
                    Filter Figure 7-2 Differential Input Filter