JAJST23 June   2024 BQ41Z50

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Equivalent Diagrams
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Supply Current
    6. 6.6  Power Supply Control
    7. 6.7  Current Wake Detector
    8. 6.8  VC0, VC1, VC2, VC3, VC4, PACK
    9. 6.9  SMBD, SMBC
    10. 6.10 PRES/SHUTDN, DISP
    11. 6.11 ALERT
    12. 6.12 Coulomb Counter Digital Filter (CC1)
    13. 6.13 ADC Digital Filter
    14. 6.14 CHG, DSG High-side NFET Drivers
    15. 6.15 Precharge (PCHG) FET Drive
    16. 6.16 FUSE Drive
    17. 6.17 Internal Temperature Sensor
    18. 6.18 TS1, TS2, TS3, TS4
    19. 6.19 Flash Memory
    20. 6.20 GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7
    21. 6.21 Elliptical Curve Cryptography (ECC)
    22. 6.22 SMBus Interface Timing
    23. 6.23 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Primary (1st Level) Safety Features
      2. 7.3.2 Secondary (2nd Level) Safety Features
      3. 7.3.3 Charge Control Features
      4. 7.3.4 Gas Gauging
      5. 7.3.5 Lifetime Data Logging Features
      6. 7.3.6 Authentication
      7. 7.3.7 Configuration
        1. 7.3.7.1 Oscillator Function
        2. 7.3.7.2 Real Time Clock
        3. 7.3.7.3 System Present Operation
        4. 7.3.7.4 Emergency Shutdown
        5. 7.3.7.5 2-Series, 3-Series, or 4-Series Cell Configuration
        6. 7.3.7.6 Cell Balancing
        7. 7.3.7.7 LED Display
      8. 7.3.8 Battery Parameter Measurements
        1. 7.3.8.1 Charge and Discharge Counting
        2. 7.3.8.2 Voltage
        3. 7.3.8.3 Current
        4. 7.3.8.4 Temperature
        5. 7.3.8.5 Communications
          1. 7.3.8.5.1 SMBus On and Off State
    4. 7.4 Device Functional Modes
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 High-Current Path
          1. 8.2.2.1.1 Protection FETs
          2. 8.2.2.1.2 Chemical Fuse
          3. 8.2.2.1.3 Lithium-Ion Cell Connections
          4. 8.2.2.1.4 Sense Resistor
          5. 8.2.2.1.5 ESD Mitigation
        2. 8.2.2.2 Gas Gauge Circuit
          1. 8.2.2.2.1 Coulomb-Counting Interface
          2. 8.2.2.2.2 Low-dropout Regulators (LDOs)
            1. 8.2.2.2.2.1 REG18
            2. 8.2.2.2.2.2 REG135
          3. 8.2.2.2.3 System Present
          4. 8.2.2.2.4 SMBus Communication
          5. 8.2.2.2.5 FUSE Circuitry
        3. 8.2.2.3 Secondary-Current Protection
          1. 8.2.2.3.1 Cell and Battery Inputs
          2. 8.2.2.3.2 External Cell Balancing
          3. 8.2.2.3.3 PACK and FET Control
          4. 8.2.2.3.4 Temperature Measurement
          5. 8.2.2.3.5 LEDs
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
        2. 8.4.1.2 ESD Spark Gap
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

BQ41Z50 RSN Package32-Pin VQFN with Exposed Thermal PadTop View Figure 5-1 RSN Package32-Pin VQFN with Exposed Thermal PadTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
SMBD 1 I/O SMBus data pin
SMBC 2 I/O SMBus clock pin
LEDCNTLA/GPIO4 3 I/O LED display segment that drives the external LEDs via an internal current sink depending on the firmware configuration. Alternatively, this pin is push-pull and can be configured as a general-purpose digital input with or without INT or general-purpose digital output pin. If this pin is not used, it can be left floating or connected to VSS through a 20kΩ resistor.
LEDCNTLB/GPIO5 4 I/O LED display segment that drives the external LEDs via an internal current sink depending on the firmware configuration. Alternatively, this pin is push-pull and can be configured as a general-purpose digital input with or without INT or general-purpose digital output pin. If this pin is not used, it can be left floating or connected to VSS through a 20kΩ resistor.
ALERT 5 O Alert digital signal output from digital core to signal interrupt detection
GPIO3 6 I/O Multifunction open drain pin, general-purpose digital input with or without INT, or general-purpose digital output
PRES/SHUTDN 7 I Host system present input for removable battery pack or emergency system shutdown input for embedded pack
LEDCNTLC/GPIO6 8 I/O LED display segment that drives the external LEDs via an internal current sink depending on the firmware configuration. Alternatively, this pin is push-pull and can be configured as a general-purpose digital input with or without INT or general-purpose digital output pin. If this pin is not used, it can be left floating or connected to VSS through a 20kΩ resistor.
GPIO1 9 I/O Multifunction push-pull pin, general-purpose digital input with or without INT, or general-purpose digital output
GPIO2 10 I/O Multifunction push-pull pin, general-purpose digital input with or without INT, general-purpose digital output, or PWM output
VSS 11 P Device ground
FUSE 12 I/O Fuse sense input or drive output pin. If not used, connect directly to VSS.
PCHG 13 O PMOS Precharge FET drive output pin. If not used, it can be left floating or connected to VSS through a 20kΩ resistor.
VCC 14 P Secondary power supply input
PACK 15 AI Pack sense input pin
DSG 16 O NMOS Discharge FET drive output pin, If not used, it can be left floating or connected to VSS through a 20kΩ resistor.
CHG 17 O NMOS Charge FET drive output pin, If not used, it can be left floating or connected to VSS through a 20kΩ resistor.
BAT 18 P Primary power supply input pin
VC4 19 AI Sense voltage input pin for the fourth cell from the bottom of the stack, balance current input for the fourth cell from the bottom of the stack
VC3 20 AI Sense voltage input pin for the third cell from the bottom of the stack, balance current input for the third cell from the bottom of the stack, and return balance current for the fourth cell from the bottom of the stack
VC2 21 AI Sense voltage input pin for the second cell from the bottom of the stack, balance current input for the second cell from the bottom of the stack, and return balance current for the third cell from the bottom of the stack
VC1 22 AI Sense voltage input pin for the first cell from the bottom of the stack, balance current input for the first cell from the bottom of the stack, and return balance current for the second cell from the bottom of the stack
VC0 23 AI Sense voltage input pin for the negative terminal of the first cell from the bottom of the stack, and return balance current for the first cell from the bottom of the stack
SRP 24 AI Analog input pin connected to the internal coulomb counter peripheral for integrating a small voltage between SRP and SRN, where SRP is the top of the sense resistor. A charging current generates a positive voltage at SRP relative to SRN.
SRN 25 AI Analog input pin connected to the internal coulomb counter peripheral for integrating a small voltage between SRP and SRN, where SRN is the bottom of the sense resistor. A charging current generates a positive voltage at SRP relative to SRN.
TS1 26 AI Temperature sensor 1 thermistor input pin. Connect to a thermistor. If not used, connect directly to VSS and configure data flash accordingly.
TS2 27 AI Temperature sensor 2 thermistor input pin. Connect to a thermistor. If not used, connect directly to VSS and configure data flash accordingly.
TS3 28 AI Temperature sensor 3 thermistor input pin. Connect to a thermistor. If not used, connect directly to VSS and configure data flash accordingly.
TS4 29 AI Temperature sensor 4 thermistor input pin. Connect to a thermistor. If not used, connect directly to VSS and configure data flash accordingly.
REG18 30 P Internal regulator output. Requires CREG18 to be connected to VSS.
REG135 31 P MCU power supply. Requires CREG135 to be connected to VSS.
DISP/GPIO7 32 I/O Display control for LEDs. Alternatively, this pin is push-pull and can be configured as a general-purpose digital input with or without INT or general-purpose digital output pin. If this pin is not used, it can be left floating or connected to VSS through a 20kΩ resistor.
(1) P = Power Connection, AI = Analog Input, O = Digital Output, I = Digital Input