JAJSVH2 October   2024 ADC3908D025 , ADC3908D065 , ADC3908D125 , ADC3908S025 , ADC3908S065 , ADC3908S125

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Power Consumption
    6. 6.6  Electrical Characteristics - DC Specifications
    7. 6.7  Electrical Characteristics - AC Specifications (25 MSPS)
    8. 6.8  Electrical Characteristics - AC Specifications (65 MSPS)
    9. 6.9  Electrical Characteristics - AC Specifications (125 MSPS)
    10. 6.10 Timing Requirements
    11. 6.11 Output Interface Timing Diagram
    12. 6.12 Typical Characteristics: 25MSPS
    13. 6.13 Typical Characteristics - 65MSPS
    14. 6.14 Typical Characteristics - 125MSPS
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
        1. 7.3.1.1 Single Ended Input
        2. 7.3.1.2 Differential Input
        3. 7.3.1.3 Analog Input Bandwidth
      2. 7.3.2 Sampling Clock Input
      3. 7.3.3 Digital Interface
        1. 7.3.3.1 Test Pattern
        2. 7.3.3.2 Interface Configuration using Pin Control
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Power Down
  9. 8 Application Information Disclaimer
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
        1. 8.1.2.1 Input Signal Path
        2. 8.1.2.2 Sampling Clock
      3. 8.1.3 Application Curves
    2. 8.2 Initialization Set Up
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.8 Electrical Characteristics - AC Specifications (65 MSPS)

Maximum and minimum values are specified over the operating free-air temperature range and nominal supply voltages. Typical values are specified at TA = 25°C, AVDD = IOVDD = 1.8 V, FSCLK = 65 MSPS, FIN = 5MHz, AIN = -1dBFS, Internal 1.2 V reference , and 50% clock duty cycle, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
NSD Noise Spectral Density fIN = 10 MHz, AIN = -20 dBFS -125.0 dBFS/Hz
SNR Signal to noise ratio, excluding DC, HD2 to HD5 fIN = 1.1 MHz 49.8 dBFS
fIN = 5 MHz 47 49.8
fIN = 10 MHz 49.8
fIN = 20 MHz 49.8
fIN = 40 MHz 49.8
fIN = 70 MHz 49.8
SINAD Signal to noise and distortion ratio, excluding DC offset fIN = 1.1 MHz 49.6 dBFS
fIN = 5 MHz 49.7
fIN = 10 MHz 49.7
fIN = 20 MHz 49.7
fIN = 40 MHz 49.6
fIN = 70 MHz 49.6
ENOB Effective number of bits, excluding DC offset fIN = 1.1 MHz 8.0 Bit
fIN = 5 MHz 8.0
fIN = 10 MHz 8.0
fIN = 20 MHz 8.0
fIN = 40 MHz 8.0
fIN = 70 MHz 8.0
THD Total Harmonic Distortion (First five harmonics) fIN = 1.1 MHz -61 dBc
fIN = 5 MHz -63
fIN = 10 MHz -63
fIN = 20 MHz -64
fIN = 40 MHz -62
fIN = 70 MHz -61
SFDR Spur free dynamic range including second and third harmonic fIN = 1.1 MHz 62 dBFS
fIN = 5 MHz 60 64
fIN = 10 MHz 64
fIN = 20 MHz 65
fIN = 40 MHz 63
fIN = 70 MHz 62
SPUR Spur free dynamic range (excluding DC, HD2, HD3) fIN = 1.1 MHz 68 dBFS
fIN = 5 MHz 61 68
fIN = 10 MHz 68
fIN = 20 MHz 68
fIN = 40 MHz 68
fIN = 70 MHz 68
IMD3 Two tone inter-modulation distortion fIN = 8/10 MHz, AIN = -7 dBFS/tone -91 dBc
XTALK Channel-to-channel crosstalk Aggressor = 1.1 MHz 106 dBFS
Aggressor = 10 MHz 102
Aggressor = 20 MHz 97