SBAA461 December   2020 ADC3541 , ADC3542 , ADC3543 , ADC3544 , ADC3641 , ADC3642 , ADC3643 , ADC3644 , ADC3660 , ADC3681 , ADC3682 , ADC3683

 

  1.   Trademarks
  2. 1Introduction
  3. 2Reduce Data Rates: Optimize Pin Count and Data Rate
    1. 2.1 Parallel CMOS
      1. 2.1.1 Parallel SDR
      2. 2.1.2 Parallel DDR
    2. 2.2 Serial CMOS
      1. 2.2.1 2 Wire
      2. 2.2.2 1 Wire
      3. 2.2.3 0.5 Wire
  4. 3Reduce Data Rates: Decimation
  5. 4Summary
  6. 5References

4 Summary

Modern high-speed SAR ADCs, like the ADC3643, offer many options that offer ease of use, and allow for optimizations that were not possible with previous generation devices. Options similar to serial CMOS output, and on-chip decimation, can open doors for using high-speed ADCs in your upcoming projects, or help to improve your current design by reducing pin count and data rates.

For more information on decimation, and other high-speed data converter topics, please follow this link to TI's training videos.