SBAA525A september   2021  – may 2023 AFE7900 , AFE7920 , AFE7950

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Highlighted Products
    2. 1.2 Device Loopback Modes
      1. 1.2.1 ADC to DAC JESD Loopback
      2. 1.2.2 ADC to DAC Low Latency Loopback
  5. 2Tests and Results
    1. 2.1 Test Methodology
      1. 2.1.1 Hardware Setup
        1. 2.1.1.1 ADC to DAC JESD Loopback
        2. 2.1.1.2 ADC to DAC Low Latency Loopback
      2. 2.1.2 GUI Setup
        1. 2.1.2.1 ADC to DAC JESD Loopback
        2. 2.1.2.2 ADC to DAC Low Latency Loopback
      3. 2.1.3 Test Conditions
      4. 2.1.4 Test Results
        1. 2.1.4.1 ADC to DAC JESD Loopback
          1. 2.1.4.1.1 JESD 122.88 MSPS
          2. 2.1.4.1.2 JESD 184.32 MSPS
          3. 2.1.4.1.3 JESD 245.76 MSPS
          4. 2.1.4.1.4 JESD 368.64 MSPS
          5. 2.1.4.1.5 JESD 491.52 MSPS
        2. 2.1.4.2 ADC to DAC Low Latency Loopback
  6. 3Conclusion
  7. 4References
  8. 5Revision History

2.1.2.2 ADC to DAC Low Latency Loopback

This loops back the FB ADC output (before the decimation) to TX A/C, and therefore has very low loopback latency. This loopback can be set using the parameter enableTxFbLoopbackLowLatencyMode. It is independent control for looping back FBAB to TXA and FBCD to TXC. For example, to loopback FBAB to TXA, and use FBCD and TXCD in straight mode, this parameter can be set as sysParams.enableTxFbLoopbackLowLatencyMode = [True, False]. The first value in the list is for FBAB and second is for FBCD.