SBAA590 june   2023 ADC12DJ5200RF , ADC32RF52 , ADC32RF54 , ADC32RF55 , ADC34RF52 , ADC34RF55

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Achieving Accuracy Through Calibration
    1. 2.1 Temperature Variations
    2. 2.2 External Noise
    3. 2.3 Unstable Power Supply
    4. 2.4 Mechanical Stress
    5. 2.5 Manufacturing Variations
    6. 2.6 Avoiding Errors
  6. 3Calibration Techniques
    1. 3.1 One-Time Calibration
    2. 3.2 Foreground Calibration
    3. 3.3 Background Calibration
  7. 4Summary
  8. 5References

1 Introduction

High-speed ADCs play a crucial role in modern highly-integrated digital systems; however, these ADCs are prone to introducing a range of errors, which significantly impacts the accuracy of the sampled signal. Among these errors are gain errors, offset errors, and linearity deviations, which cause distortion of the obtained data. Fortunately, calibration can effectively minimize these errors and enhance the performance of the ADC, bringing it closer to the expected behavior.

Calibration has become an essential aspect of modern ADC designs, driven by the adoption of more advanced process nodes (such as 0.18 μm or smaller). These process nodes allow for additional digital feature integration within the ADC architecture. By introducing serial registers to enable or disable specific features, the concept of digital trimming emerged as a replacement for the traditional method of laser trimming the bias currents of a device for improved INL and linearity.

Reflecting on the past when laser trimming of internal ADC bias currents was the norm, the ADC performance of the ADC was fixed at the highest speed or sampling rate for which it was trimmed. Any deviation from this intended sample rate resulted in compromised performance. This limitation drove the push towards multiple speed grades of a device within an ADC device family, catering towards different sampling rate requirements.

As technology advanced further, reaching 65 nm and below, the space for digital features on a data converter has grown significantly, enabling the incorporation of more digital components and features. This expansion opens up new possibilities for real-time calibration and allows for dynamic trimming of the ADC.

Real-time calibration has become the standard approach for linearizing ADC performance at various sample rates and input frequencies. These calibration methods act to provide flexibility to system designers, allowing for a tailored ADC performance in their specific application. By providing a seemingly unlimited amount of flexibility, calibration enables the system designer to achieve optimal performance regardless of the variation in sampling rate or input frequency (a significant advancement over laser trimming). As a result, the same ADC delivers excellent performance across many different applications, enabling reconfigurable systems.