SBAA600 October   2024 TAA5212 , TAC5111 , TAC5112 , TAC5211 , TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Voice Activity Detection
    1. 2.1 VAD Configurations
      1. 2.1.1 User, Auto, Intermediate
      2. 2.1.2 VAD With ADC Recording
      3. 2.1.3 VAD Monitoring Channel
      4. 2.1.4 VAD Interrupt Pin
      5. 2.1.5 MICBIAS Enable During PDM Monitoring
      6. 2.1.6 VAD Clock Configurabilty
    2. 2.2 VAD Parameters
      1. 2.2.1 Initial Learning Period
      2. 2.2.2 Hold Over Counter
      3. 2.2.3 Wakeup Wait
      4. 2.2.4 Threshold
  6. 3VAD Performance Results
  7. 4Examples
  8. 5Summary
  9. 6References

VAD Interrupt Pin

SDOUT pin can be used for VAD interrupt and the GPOx or GPIOx pins can be configured as primary ASI output during ADC recording simultaneously with VAD monitoring.

When the SDOUT pin is configured as the VAD interrupt, SDOUT pin follows the polarity set by the INT_POL[7] bit of INT_CFG[7] register (page = 0x00, address = 0x42).

As Table 2-6 shows, SDOUT as interrupt selection is done using the LPAD_SDOUT_INT_CFG[3] bit of LPAD_CFG1 register (page = 0x01, address = 0x1E).

Table 2-6 SDOUT as Interrupt Selection Using VAD_CFG2 Register
Bit Field Type Reset Description
3 SDOUT_INT_CFG R/W 0b SDOUT interrupt configuration.
0d = SDOUT pin is not enabled for interrupt function
1d = SDOUT pin is enabled to support interrupt output when channel data in not being recorded