SBAS884A March 2020 – June 2020 PCM6240-Q1 , PCM6260-Q1 , PCM6340-Q1 , PCM6360-Q1
PRODUCTION DATA.
ADDRESS | REGISTER | DESCRIPTION | SECTION |
0x00 | PAGE_CFG | Device page register | PAGE_CFG Register (P0_R0) |
0x01 | SW_RESET | Software reset register | SW_RESET Register (P0_R1) |
0x02 | SLEEP_CFG | Sleep mode register | SLEEP_CFG Register (P0_R2) |
0x05 | SHDN_CFG | Shutdown configuration register | SHDN_CFG Register (P0_R5) |
0x07 | ASI_CFG0 | ASI configuration register 0 | ASI_CFG0 Register (P0_R7) |
0x08 | ASI_CFG1 | ASI configuration register 1 | ASI_CFG1 Register (P0_R8) |
0x09 | ASI_CFG2 | ASI configuration register 2 | ASI_CFG2 Register (P0_R9) |
0x0B | ASI_CH1 | Channel 1 ASI slot configuration register | ASI_CH1 Register (P0_R11) |
0x0C | ASI_CH2 | Channel 2 ASI slot configuration register | ASI_CH2 Register (P0_R12) |
0x0D | ASI_CH3 | Channel 3 ASI slot configuration register | ASI_CH3 Register (P0_R13) |
0x0E | ASI_CH4 | Channel 4 ASI slot configuration register | ASI_CH4 Register (P0_R14) |
0x0F | ASI_CH5 | Channel 5 ASI slot configuration register | ASI_CH5 Register (P0_R15) |
0x10 | ASI_CH6 | Channel 6 ASI slot configuration register | ASI_CH6 Register (P0_R16) |
0x13 | MST_CFG0 | ASI master mode configuration register 0 | MST_CFG0 Register (P0_R19) |
0x14 | MST_CFG1 | ASI master mode configuration register 1 | MST_CFG1 Register (P0_R20) |
0x15 | ASI_STS | ASI bus clock monitor status register | ASI_STS Register (P0_R21) |
0x16 | CLK_SRC | Clock source configuration register | CLK_SRC Register (P0_R22) |
0x21 | GPIO_CFG0 | GPIO configuration register 0 | GPIO_CFG0 Register (P0_R33) |
0x22 | GPIO_CFG1 | GPIO configuration register 1 | GPIO_CFG1 Register (P0_R34) |
0x23 | GPIO_CFG2 | GPIO configuration register 2 | GPIO_CFG2 Register (P0_R35) |
0x24 | GPI_CFG0 | GPI configuration register 0 | GPI_CFG0 Register (P0_R36) |
0x25 | GPI_CFG1 | GPI configuration register 1 | GPI_CFG1 Register (P0_R37) |
0x26 | GPIO_VAL | GPIO output value register | GPIO_VAL Register (P0_R38) |
0x27 | GPIO_MON | GPIO monitor value register | GPIO_MON Register (P0_R39) |
0x28 | INT_CFG | Interrupt configuration register | INT_CFG Register (P0_R40) |
0x29 | INT_MASK0 | Interrupt mask register 0 | INT_MASK0 Register (P0_R41) |
0x2A | INT_MASK1 | Interrupt mask register 1 | INT_MASK1 Register (P0_R42) |
0x2B | INT_MASK2 | Interrupt mask register 2 | INT_MASK2 Register (P0_R43) |
0x2C | INT_LTCH0 | Latched interrupt readback register 0 | INT_LTCH0 Register (P0_R44) |
0x2D | CHx_LTCH | Channel diagnostic summary latched status register | CHx_LTCH Register (P0_R45) |
0x2E | CH1_LTCH | Channel 1 diagnostic latched status register | CH1_LTCH Register (P0_R46) |
0x2F | CH2_LTCH | Channel 2 diagnostic latched status register | CH2_LTCH Register (P0_R47) |
0x30 | CH3_LTCH | Channel 3 diagnostic latched status register | CH3_LTCH Register (P0_R48) |
0x31 | CH4_LTCH | Channel 4 diagnostic latched status register | CH4_LTCH Register (P0_R49) |
0x32 | CH5_LTCH | Channel 5 diagnostic latched status register | CH5_LTCH Register (P0_R50) |
0x33 | CH6_LTCH | Channel 6 diagnostic latched status register | CH6_LTCH Register (P0_R51) |
0x34 | INT_MASK3 | Interrupt mask register 3 | INT_MASK3 Register (P0_R52) |
0x35 | INT_LTCH1 | Latched interrupt readback register 1 | INT_LTCH1 Register (P0_R53) |
0x36 | INT_LTCH2 | Latched interrupt readback register 2 | INT_LTCH2 Register (P0_R54) |
0x37 | INT_LTCH3 | Latched interrupt readback register 3 | INT_LTCH3 Register (P0_R55) |
0x38 | MBDIAG_CFG0 | MICBIAS diagnostic register 0 | MBDIAG_CFG0 Register (P0_R56) |
0x39 | MBDIAG_CFG1 | MICBIAS diagnostic register 1 | MBDIAG_CFG1 Register (P0_R57) |
0x3A | MBDIAG_CFG2 | MICBIAS diagnostic register 2 | MBDIAG_CFG2 Register (P0_R58) |
0x3B | BIAS_CFG | Bias configuration register | BIAS_CFG Register (P0_R59) |
0x3C | CH1_CFG0 | Channel 1 configuration register 0 | CH1_CFG0 Register (P0_R60) |
0x3D | CH1_CFG1 | Channel 1 configuration register 1 | CH1_CFG1 Register (P0_R61) |
0x3E | CH1_CFG2 | Channel 1 configuration register 2 | CH1_CFG2 Register (P0_R62) |
0x3F | CH1_CFG3 | Channel 1 configuration register 3 | CH1_CFG3 Register (P0_R63) |
0x40 | CH1_CFG4 | Channel 1 configuration register 4 | CH1_CFG4 Register (P0_R64) |
0x41 | CH2_CFG0 | Channel 2 configuration register 0 | CH2_CFG0 Register (P0_R65) |
0x42 | CH2_CFG1 | Channel 2 configuration register 1 | CH2_CFG1 Register (P0_R66) |
0x43 | CH2_CFG2 | Channel 2 configuration register 2 | CH2_CFG2 Register (P0_R67) |
0x44 | CH2_CFG3 | Channel 2 configuration register 3 | CH2_CFG3 Register (P0_R68) |
0x45 | CH2_CFG4 | Channel 2 configuration register 4 | CH2_CFG4 Register (P0_R69) |
0x46 | CH3_CFG0 | Channel 3 configuration register 0 | CH3_CFG0 Register (P0_R70) |
0x47 | CH3_CFG1 | Channel 3 configuration register 1 | CH3_CFG1 Register (P0_R71) |
0x48 | CH3_CFG2 | Channel 3 configuration register 2 | CH3_CFG2 Register (P0_R72) |
0x49 | CH3_CFG3 | Channel 3 configuration register 3 | CH3_CFG3 Register (P0_R73) |
0x4A | CH3_CFG4 | Channel 3 configuration register 4 | CH3_CFG4 Register (P0_R74) |
0x4B | CH4_CFG0 | Channel 4 configuration register 0 | CH4_CFG0 Register (P0_R75) |
0x4C | CH4_CFG1 | Channel 4 configuration register 1 | CH4_CFG1 Register (P0_R76) |
0x4D | CH4_CFG2 | Channel 4 configuration register 2 | CH4_CFG2 Register (P0_R77) |
0x4E | CH4_CFG3 | Channel 4 configuration register 3 | CH4_CFG3 Register (P0_R78) |
0x4F | CH4_CFG4 | Channel 4 configuration register 4 | CH4_CFG4 Register (P0_R79) |
0x50 | CH5_CFG0 | Channel 5 configuration register 0 | CH5_CFG0 Register (P0_R80) |
0x51 | CH5_CFG1 | Channel 5 configuration register 1 | CH5_CFG1 Register (P0_R81) |
0x52 | CH5_CFG2 | Channel 5 configuration register 2 | CH5_CFG2 Register (P0_R82) |
0x53 | CH5_CFG3 | Channel 5 configuration register 3 | CH5_CFG3 Register (P0_R83) |
0x54 | CH5_CFG4 | Channel 5 configuration register 4 | CH5_CFG4 Register (P0_R84) |
0x55 | CH6_CFG0 | Channel 6 configuration register 0 | CH6_CFG0 Register (P0_R85) |
0x56 | CH6_CFG1 | Channel 6 configuration register 1 | CH6_CFG1 Register (P0_R86) |
0x57 | CH6_CFG2 | Channel 6 configuration register 2 | CH6_CFG2 Register (P0_R87) |
0x58 | CH6_CFG3 | Channel 6 configuration register 3 | CH6_CFG3 Register (P0_R88) |
0x59 | CH6_CFG4 | Channel 6 configuration register 4 | CH6_CFG4 Register (P0_R89) |
0x64 | DIAG_CFG0 | Input diagnostic configuration register 0 | DIAG_CFG0 Register (P0_R100) |
0x65 | DIAG_CFG1 | Input diagnostic configuration register 1 | DIAG_CFG1 Register (P0_R101) |
0x66 | DIAG_CFG2 | Input diagnostic configuration register 2 | DIAG_CFG2 Register (P0_R102) |
0x67 | DIAG_CFG3 | Input diagnostic configuration register 3 | DIAG_CFG3 Register (P0_R103) |
0x68 | DIAG_CFG4 | Input diagnostic configuration register 4 | DIAG_CFG4 Register (P0_R104) |
0x6B | DSP_CFG0 | DSP configuration register 0 | DSP_CFG0 Register (P0_R107) |
0x6C | DSP_CFG1 | DSP configuration register 1 | DSP_CFG1 Register (P0_R108) |
0x70 | AGC_CFG0 | AGC configuration register 0 | AGC_CFG0 Register (P0_R112) |
0x73 | IN_CH_EN | Input channel enable configuration register | IN_CH_EN Register (P0_R115) |
0x74 | ASI_OUT_CH_EN | ASI output channel enable configuration register | ASI_OUT_CH_EN Register (P0_R116) |
0x75 | PWR_CFG | Power up configuration register | PWR_CFG Register (P0_R117) |
0x76 | DEV_STS0 | Device status value register 0 | DEV_STS0 Register (P0_R118) |
0x77 | DEV_STS1 | Device status value register 1 | DEV_STS1 Register (P0_R119) |
0x7E | I2C_CKSUM | I2C checksum register | I2C_CKSUM Register (P0_R126) |