SBOA563 March 2023 JFE2140
The JFET preamplifier (preamp) circuit is easiest to analyze using the small-signal T-model as shown in #GUID-54BF9E97-2026-4543-958B-9001AB9130E2. To understand the operation of this circuit, begin by examining the preamp at the input. A sensor generates a small-signal input voltage (vin), which modulates the gate-to-source voltage (vgs) of the JFET. The JFE2140 is the first gain stage in the preamp circuit and conducts a small-signal drain-to-source current ids1 = gm1 × vgs1 that fluctuates with vin. The transconductance gain parameter (gm), is expressed in Siemens and vgs is expressed in volts.
The small-signal current ids1 flows through resistors RD1 and RD2 forming a differential voltage vod between the drains of the JFE2140. The OPA202 monitors vod and drives the loop with voltage vout such that the inputs of the OPA202 are approximately equal. The JFE2140 combined with the OPA202 form the feedforward gain stage A shown in #GUID-54BF9E97-2026-4543-958B-9001AB9130E2. Assuming symmetry and ids1 = ids2, the gain of the JFE2140 is gm × RD. The transconductance parameter gm can be approximated from #GUID-120A230B-5D0F-4C30-99F3-77806C02CB36. At a drain-to-source current of 1 mA, the measured gm is approximately 7.5 mS.
The DC Aol of the OPA202 is 150 dB. Combined with the JFET gain, the resulting feedforward gain A is calculated as shown in #EQUATION-BLOCK_GLL_4BT_NVB. The simulated feed forward gain is shown in #FIG_YFV_2XS_NVB and is A = 175 dB. This closely matches the calculated result.
Because wafer process variations can yield up to 30% variations in gm, adding a feedback network (β) maintains a predictable closed-loop gain. The β feedback network consists of resistors RF, and RG2 and is a series-shunt feedback network. The β network samples vout by shunting the output of the OPA202 and feeds back a proportional voltage vfb. The voltage vfb = vgs2. The gate is the feedback-summing node of the circuit. In this configuration, the loop is closed. An increase of the input differential voltage vid results in a rise of vod and therefore vout. If vout rises, then vgs2 rises. An increase of vgs2 lowers vid. A decrease of the differential voltage between the JFET drains is observed. The final outcome is a reduction of vout which completes the negative feedback loop of the preamplifier.
The standard closed-loop gain (Acl) #EQUATION-BLOCK_MBQ_CCC_WQB applies.
Assuming the feedforward gain A is much greater than β, Acl is approximately determined by resistors RF and RG2 in the mid-band frequencies. Acl can be approximately calculated using #EQUATION-BLOCK_JJR_CFJ_MVB .
#FIG_CCJ_MTZ_5QB shows the closed-loop gain vs frequency response of the JFET preamplifier circuit.
#FIG_V2D_2HX_HWB compares the gain bandwidth of the JFE2140 composite preamp circuit to the OPA202 and the OPA145. Each configuration is in a gain of 60 dB. Table 2-1 shows that the JFE2140 composite preamp circuit achieves the highest bandwidth of the 3 circuits. This is made possible by the additional feedforward gain that the discrete JFET front end contributes. Table 2-1 also shows the ultra-low-noise performance that the JFE2140 composite circuit achieves.
Amplifier | –3 dB Point |
Voltage Noise Input-Referred f = 1 kHz |
Total Iq |
---|---|---|---|
JFE2140 Composite Preamp Circuit | 17.3 kHz | 3.6 mA | |
OPA145 | 5.56 kHz | 449 µA | |
OPA202 | 988 Hz | 582 µA |