SBOK074 august   2023 SN54SC245-SEP

PRODUCTION DATA  

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Device Information
    1. 1.1 Device Details
  5. 2Total Dose Test Setup
    1. 2.1 Test Overview
    2. 2.2 Test Description and Facilities
    3. 2.3 Test Setup Details
      1. 2.3.1 Biased
    4. 2.4 Test Configuration and Condition
  6. 3TID Characterization Test Results
    1. 3.1 TID Characterization Summary Results
    2. 3.2 Specification Compliance Matrix
  7. 4Reference Documents
  8. 5Appendix: HDR TID Report Data

Test Configuration and Condition

A step-stress (10k, 20k, 30k and 50k) test method was used to determine the TID hardness level. That is, after a predetermined TID level was reached, an electrical test was performed on a given sample of parts to verify that the units are within specified data sheet electrical test limits. From initial feasibility studies the difference between pre- and post irradiation was greater for samples that were biased. For example, for RLAT 22 sample units were used at the 209-264 rad(Si)/s dose level with biased setup conditions and this will be repeated for each wafer lot. The RLAT units were parametrically tested on ATE and then put through 25ºC anneal for 50 hours. The units were then put through parametric testing on the ATE and passed all tests to the specified SMD test limits.

Table 2-1 lists the serialized samples used for TID characterization.

Table 2-1 HDR Device Information
Control GroupHDR = 264.5 rad(Si)/s
Total Samples: 4Total Samples: 40
Exposure Levels
0 krad (Si)10 krad (Si)20 krad(Si)30 krad(Si)50 krad (Si)
BiasedBiasedBiasedBiasedBiased + 50 hour annealBiased
1 - 45 - 89 - 1213 - 1617 - 4041 - 44