DRV425 Fluxgate Magnetic-Field Sensor
- SBOS729A October 2015 – March 2016 DRV425
  
  PRODUCTION DATA.

Full reading width

DATA SHEET

DRV425 Fluxgate Magnetic-Field Sensor

1 Features

High-Precision, Integrated Fluxgate Sensor:
- Offset: ±8 µT (Max)
- Offset Drift: ±5 nT/°C (Typ)
- Gain Error: 0.04% (Typ)
- Gain Drift: ±7 ppm/°C (Typ)
- Linearity: ±0.1%
- Noise: 1.5 nT/√Hz (Typ)
Sensor Range: ±2 mT (Max)
- Range and Gain Adjustable with External Resistor
Selectable Bandwidth: 47 kHz or 32 kHz
Precision Reference:
- Accuracy: 2% (max), Drift: 50 ppm/°C (max)
- Pin-Selectable Voltage: 2.5 V or 1.65 V
- Selectable Ratiometric Mode: VDD / 2
Diagnostic Features: Overrange and Error Flags
Supply Voltage Range: 3.0 V to 5.5 V

2 Applications

Linear Position Sensing
Current Sensing in Busbars
Over-the-Trace Current Sensing
General-Purpose Magnetic-Field Sensors
Overcurrent Detection
Motor Reliability Diagnostics
Frequency and Voltage Inverters
Solar Inverters

3 Description

The DRV425 is designed for single-axis magnetic field-sensing applications and enables electrically-isolated, high-sensitivity, and precise dc- and ac-field measurements. The device provides the unique and proprietary, integrated fluxgate sensor (IFG) with an internal compensation coil to support a high-accuracy sensing range of ±2 mT with a measurement bandwidth of up to 47 kHz. The low offset, offset drift, and noise of the sensor, combined with the precise gain, low gain drift, and very low nonlinearity provided by the internal compensation coil, result in unrivaled magnetic field measurement precision. The output of the DRV425 is an analog signal proportional to the sensed magnetic field.

The DRV425 offers a complete set of features, including an internal difference amplifier, on-chip precision reference, and diagnostic functions to minimize component count and system-level cost.

The DRV425 is available in a thermally-enhanced, non-magnetic, thin WQFN package with a PowerPAD™ for optimized heat dissipation, and is specified for operation over the extended industrial temperature range of –40°C to +125°C.

Device Information ⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
DRV425	WQFN (20)	4.00 mm × 4.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

4 Revision History

Changes from * Revision (October 2015) to A Revision

Repaired broken linksGo
Added last four Applications bullets Go
Changed device name in Figure 63 Go

5 Pin Configuration and Functions

RTJ Package

20-Pin WQFN

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
AINN	14	I	Inverting input of the shunt-sense amplifier
AINP	13	I	Noninverting input of the shunt-sense amplifier
BSEL	1	I	Filter bandwidth select input
COMP1	16	I	Internal compensation coil input 1
COMP2	17	I	Internal compensation coil input 2
DRV1	12	O	Compensation coil driver output 1
DRV2	11	O	Compensation coil driver output 2
ERROR	19	O	Error flag: open-drain, active-low output
GND	7, 10, 18, 20	—	Ground reference
OR	15	O	Shunt-sense amplifier overrange indicator: open-drain, active-low output
PowerPAD		—	Connect the thermal pad to GND
REFIN	5	I	Common-mode reference input for the shunt-sense amplifier
REFOUT	4	O	Voltage reference output
RSEL0	3	I	Voltage reference mode selection input 0
RSEL1	2	I	Voltage reference mode selection input 1
VDD	8, 9	—	Supply voltage, 3.0 V to 5.5 V. Decouple both pins using 1-µF ceramic capacitors placed as close as possible to the device. See the Power-Supply Decoupling and Layout sections for further details.
VOUT	6	O	Shunt-sense amplifier output

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Voltage	Supply voltage (VDD to GND)	–0.3	6.5	V
	Input voltage, except AINP and AINN pins⁽²⁾	GND – 0.5	VDD + 0.5
	Shunt-sense amplifier inputs (AINP and AINN pins)⁽³⁾	GND – 6.0	VDD + 6.0
Current	DRV1 and DRV2 pins (short-circuit current, I_OS)⁽⁴⁾	–300	300	mA
	Shunt-sense amplifier input pins AINP and AINN	–5	5
	All remaining pins	–25	25
Temperature	Junction, T_J max	–50	150	°C
Temperature	Storage, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be current limited, except for the differential amplifier input pins.

(3) These inputs are not diode-clamped to the power-supply rails.

(4) Power-limited; observe maximum junction temperature.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
VDD	Supply voltage range (VDD to GND)	3.0	5.0	5.5	V
T_A	Specified ambient temperature range	–40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		DRV425	UNIT
		RTJ (WQFN)
		20 PINS
R_θJA	Junction-to-ambient thermal resistance	34.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	33.1	°C/W
R_θJB	Junction-to-board thermal resistance	11	°C/W
ψ_JT	Junction-to-top characterization parameter	0.3	°C/W
ψ_JB	Junction-to-board characterization parameter	11	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	2.1	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

All minimum and maximum specifications are at T_A = 25°C, VDD = 3.0 V to 5.5 V, and I_DRV1 = I_DRV2 = 0 mA, unless otherwise noted. Typical values are at VDD = 5.0 V.

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
FLUXGATE SENSOR FRONT-END
	Offset		No magnetic field	–8	±2	8	µT
	Offset drift		No magnetic field		±5		nT/°C
G	Gain		Current at DRV1 and DRV2 outputs		12.2		mA/mT
	Gain error				±0.04%
	Gain drift		Best-fit line method		±7		ppm/°C
	Linearity error				0.1%
	Hysteresis		Magnetic field sweep from –10 mT to 10 mT		1.4		µT
	Noise		f = 0.1 Hz to 10 Hz		17		nTrms
	Noise density		f = 1 kHz		1.5		nT/√Hz
	Compensation range			–2		2	mT
	Saturation trip level for the ERROR pin⁽²⁾		Open-loop, uncompensated field		1.6		mT
	ERROR delay		Open-loop at B > 1.6 mT		4 to 6		µs
BW	Bandwidth		BSEL = 0, R_SHUNT = 22 Ω		32		kHz
BW	Bandwidth		BSEL = 1, R_SHUNT = 22 Ω		47		kHz
I_OS	Short-circuit current		VDD = 5 V		250		mA
I_OS	Short-circuit current		VDD = 3.3 V		150		mA
	Common-mode output voltage at the DRV1 and DRV2 pins				V_REFOUT		V
	Compensation coil resistance				100		Ω
SHUNT-SENSE AMPLIFIER
V_OO	Output offset voltage		V_AINP = V_AINN = V_REFIN, VDD = 3.0 V	–0.075	±0.01	0.075	mV
	Output offset voltage drift			–2	±0.4	2	µV/°C
CMRR	Common-mode rejection ratio, RTO⁽¹⁾		V_CM = –1 V to VDD + 1 V, V_REFIN = VDD / 2	–250	±50	250	µV/V
PSRR_AMP	Power-supply rejection ratio, RTO⁽¹⁾		VDD = 3.0 V to 5.5 V, V_CM = V_REFIN	–50	±4	50	µV/V
V_ICR	Common-mode input voltage range			–1		VDD + 1	V
z_id	Differential input impedance			16.5	20	23.5	kΩ
z_ic	Common-mode input impedance			40	50	60	kΩ
G_nom	Nominal gain		V_VOUT / (V_AINP – V_AINN)		4		V/V
E_G	Gain error			–0.3%	±0.02%	0.3%
	Gain error drift			–5	±1	5	ppm/°C
	Linearity error				12		ppm
	Voltage output swing from negative rail (OR pin trip level)⁽²⁾		VDD = 5.5 V, I_VOUT = 2.5 mA		48	85	mV
			VDD = 3.0 V, I_VOUT = 2.5 mA		56	100	mV
	Voltage output swing from positive rail (OR pin trip level)⁽²⁾		VDD = 5.5 V, I_VOUT = –2.5 mA	VDD – 85	VDD – 48		mV
			VDD = 3.0 V, I_VOUT = –2.5 mA	VDD – 100	VDD – 56		mV
	Signal overrange indication delay (OR pin)⁽²⁾		V_IN = 1-V step		2.5 to 3.5		µs
I_OS	Short-circuit current		VOUT connected to GND		–18		mA
I_OS	Short-circuit current		VOUT connected to VDD		20		mA
BW_–3dB	Bandwidth				2		MHz
SR	Slew rate				6.5		V/µs
t_sa	Settling time	Large signal	ΔV = ± 2 V to 1%, no external filter		0.9		µs
t_sa	Settling time	Small signal	ΔV = ± 0.4 V to 0.01%		8		µs
e_n	Output voltage noise density		f = 1 kHz, compensation loop disabled		170		nV/√Hz
V_REFIN	Input voltage range at pin REFIN		Input voltage range at REFIN pin	GND		VDD	V
VOLTAGE REFERENCE
V_REFOUT	Reference output voltage at the REFOUT pin		RSEL[1:0] = 00, no load	2.45	2.5	2.55	V
			RSEL[1:0] = 01, no load	1.6	1.65	1.7	V
			RSEL[1:0] = 1x, no load	45	50	55	% of VDD
	Reference output voltage drift		RSEL[1:0] = 0x	–50	±10	50	ppm/°C
	Voltage divider gain error drift		RSEL[1:0] = 1x	–50	±10	50	ppm/°C
PSRR_REF	Power-supply rejection ratio		RSEL[1:0] = 0x	–300	±15	300	µV/V
ΔV_O(ΔIO)	Load regulation		RSEL[1:0] = 0x, load to GND or VDD, ΔI_LOAD = 0 mA to 5 mA, T_A = –40°C to +125°C		0.15	0.35	mV/mA
ΔV_O(ΔIO)	Load regulation		RSEL[1:0] = 1x, load to GND or VDD, ΔI_LOAD = 0 mA to 5 mA, T_A = –40°C to +125°C		0.3	0.8	mV/mA
I_OS	Short-circuit current		REFOUT connected to VDD		20		mA
I_OS	Short-circuit current		REFOUT connected to GND		–18		mA
DIGITAL INPUTS/OUTPUTS (CMOS)
I_IL	Input leakage current				0.01		µA
V_IH	High-level input voltage		T_A = –40°C to +125°C	0.7 × VDD		VDD + 0.3	V
V_IL	Low-level input voltage		T_A = –40°C to +125°C	–0.3		0.3 × VDD	V
V_OH	High-level output voltage		Open-drain output	Set by external pullup resistor			V
V_OL	Low-level output voltage		4-mA sink current		0.3		V
POWER SUPPLY
I_Q	Quiescent current		I_DRV1/2 = 0 mA, 3.0 V ≤ VDD ≤ 3.6 V, T_A = –40°C to +125°C		6	8	mA
I_Q	Quiescent current		I_DRV1/2 = 0 mA, 4.5 V ≤ VDD ≤ 5.5 V, T_A = –40°C to +125°C		7	10	mA
V_POR	Power-on reset threshold				2.4		V

(1) Parameter value is referred-to-output (RTO).

(2) See the Magnetic Field Range, Overrange Indicator, and Error Flag section for details on the behavior of the ERROR and OR outputs.

6.6 Typical Characteristics

at VDD = 5 V and T_A = 25°C (unless otherwise noted)

VDD = 5 V

Figure 1. Fluxgate Sensor Front-End Offset Histogram

Figure 3. Fluxgate Sensor Front-End Offset vs
Supply Voltage

Figure 5. Fluxgate Sensor Front-End Offset Drift Histogram

Figure 7. Fluxgate Sensor Front-End Gain vs
Supply Voltage

VDD = 5 V

Figure 9. Fluxgate Sensor Front-End Linearity Histogram

Figure 11. Fluxgate Sensor Front-End Linearity vs Temperature

VDD = 5 V

Figure 13. Fluxgate Sensor Saturation (ERROR Pin)
Trip Level Histogram

Figure 15. Fluxgate Sensor Saturation (ERROR Pin) Trip Level vs Temperature

Figure 17. Compensation Coil Resistance vs Temperature

VDD = 3.3 V

Figure 19. Shunt-Sense Amplifier Output Offset Histogram

Figure 21. Shunt-Sense Amplifier Output Offset vs Temperature

Figure 23. Shunt-Sense Amplifier CMRR vs
Input Signal Frequency

Figure 25. Shunt-Sense Amplifier PSRR vs
Ripple Frequency

Figure 27. Shunt-Sense Amplifier AINP Input Impedance
vs Temperature

Figure 29. Shunt-Sense Amplifier AINN Input Impedance
vs Temperature

Including IFG, VDD = 3.3 V

Figure 31. Shunt-Sense Amplifier Gain Error Histogram

Figure 33. Shunt-Sense Amplifier Gain vs
Input Signal Frequency

Figure 35. OR Pin Trip Level vs Output Current

Figure 37. OR Pin Trip Level vs Temperature

Figure 39. Shunt-Sense Amplifier Output Short-Circuit Current vs Supply Voltage

Rising edge

Figure 41. Shunt-Sense Amplifier Small-Signal
Settling Time

Rising edge

Figure 43. Shunt-Sense Amplifier Large-Signal
Settling Time

VDD = 5 V

Figure 45. Shunt-Sense Amplifier Overload Recovery Response

Figure 47. Shunt-Sense Amplifier Output Voltage Noise Density vs Noise Frequency

V_REFOUT = 1.65 V

Figure 49. Reference Voltage Histogram

Figure 51. Reference Voltage vs Temperature

Figure 53. Reference Voltage Drift Histogram

Figure 55. Reference Voltage Load Regulation Histogram

Figure 57. Quiescent Current vs Supply Voltage

Figure 59. Supply Current vs Magnetic Field

VDD = 3.3 V

Figure 2. Fluxgate Sensor Front-End Offset Histogram

Figure 4. Fluxgate Sensor Front-End Offset vs
Temperature

VDD = 5 V

Figure 6. Fluxgate Sensor Front-End Gain Histogram

Figure 8. Fluxgate Sensor Front-End Gain vs Temperature

Figure 10. Fluxgate Sensor Front-End Linearity vs
Supply Voltage

Figure 12. Fluxgate Sensor Front-End Noise Density vs Noise Frequency

VDD = 3.3 V

Figure 14. Fluxgate Sensor Saturation (ERROR Pin)
Trip Level Histogram

Figure 16. Compensation Coil Resistance Histogram

VDD = 5 V

Figure 18. Shunt-Sense Amplifier Output Offset Histogram

Figure 20. Shunt-Sense Amplifier Output Offset vs
Supply Voltage

Figure 22. Shunt-Sense Amplifier CMRR Histogram

Figure 24. Shunt-Sense Amplifier PSRR Histogram

Figure 26. Shunt-Sense Amplifier AINP Input Impedance Histogram

Figure 28. Shunt-Sense Amplifier AINN Input Impedance Histogram

Including IFG, VDD = 5 V

Figure 30. Shunt-Sense Amplifier Gain Error Histogram

Figure 32. Shunt-Sense Amplifier Gain Error vs
Temperature

Figure 34. Shunt-Sense Amplifier Linearity Error vs
Supply Voltage

Figure 36. OR Pin Trip Level vs Supply Voltage

Figure 38. OR Pin Trip Delay vs Temperature

Figure 40. Shunt-Sense Amplifier Output Short-Circuit Current vs Temperature

Falling edge

Figure 42. Shunt-Sense Amplifier Small-Signal
Settling Time

Falling edge

Figure 44. Shunt-Sense Amplifier Large-Signal
Settling Time

VDD = 3.3 V

Figure 46. Shunt-Sense Amplifier Overload Recovery Response

V_REFOUT = 2.5 V

Figure 48. Reference Voltage Histogram

Figure 50. Reference Voltage vs Supply Voltage

Figure 52. Reference Voltage vs Reference Output Current

Figure 54. Reference Voltage PSRR Histogram

Figure 56. Reference Short-Circuit Current vs Temperature

Figure 58. Quiescent Current vs Temperature

Figure 60. Power-On Reset Threshold vs Temperature

7 Detailed Description

7.1 Overview

Magnetic sensors are used in a broad range of applications (such as position, indirect ac and dc current, or torque measurement). Hall-effect sensors are most common in magnetic field sensing, but their offset, noise, gain variation, and nonlinearity limit the achievable resolution and accuracy of the system. Fluxgate sensors offer significantly higher sensitivity, lower drift, lower noise, and high linearity and enable up to 1000-times better accuracy of the measurement.

As shown in the Functional Block Diagram section, the DRV425 consists of a magnetic fluxgate sensor with the necessary sensor conditioning and compensation coil to internally close the control loop. The fluxgate sensor is repeatedly driven in and out of saturation and supports hysteresis-free operation with excellent accuracy. The internal compensation coil assures stable gain and high linearity.

The magnetic field (B) is detected by the internal fluxgate sensor in the DRV425. The device integrates the sensor output to assure high-loop gain. The integrator output connects to the built-in differential driver that drives an opposing compensation current through the internal compensation coil. The compensation coil generates an opposite magnetic field that brings the original magnetic field at the sensor back to zero.

The compensation current is proportional to the external magnetic field and its value is 12.2 mA/mT. This compensation current generates a voltage drop across an external shunt resistor, R_SHUNT. An integrated difference amplifier with a fixed gain of 4 V/V measures this voltage and generates an output voltage that is referenced to REFIN and is proportional to the magnetic field. The value of the output voltage at the VOUT pin (V_VOUT) is calculated using Equation 1:

Equation 1. V_VOUT [V] = B × G × R_SHUNT × G_AMP = B [mT] × 12.2 mA/mT × R_SHUNT [Ω] × 4 [V/V]

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Fluxgate Sensor Front-End

The following sections describe the functional blocks and features of the integrated fluxgate sensor front-end.

7.3.1.1 Fluxgate Sensor

The fluxgate sensor of the DRV425 is uniquely suited for high-performance magnetic-field sensors because of the high sensitivity, low noise, and low offset of the sensor. The fluxgate principle relies on repeatedly driving the sensor in and out of saturation; therefore, the sensor is free of any significant magnetic hysteresis. The feedback loop accurately drives a compensation current through the integrated compensation coil and drives the magnetic field at the sensor back to zero. This approach supports excellent gain stability and high linearity of the measurement.

The DRV425 package is free of any ferromagnetic materials in order to prevent magnetization by external fields and to obtain accurate and hysteresis-free operation. Select non-magnetizable materials for the printed circuit board (PCB) and passive components in the direct vicinity of the DRV425; see the Layout Guidelines section for more details.

The orientation and the sensitivity axis of the fluxgate sensor is indicated by a dashed line on the top of the package, as shown in Figure 61. Figure 61 also shows the location of the sensor inside the package.

Figure 61. Magnetic Sensitivity Direction of the Integrated Fluxgate Sensor

The sensitivity of the fluxgate sensor is a vector function of its sensitivity axis and the magnetic field orientation. Figure 62 shows the output of the DRV425 in dependency of the orientation of the device to a constant magnetic field.

Figure 62. DRV425 Output vs Magnetic Field Orientation

7.3.1.2 Bandwidth

The small-signal bandwidth of the DRV425 is determined by the behavior of the compensation loop versus frequency. The implemented integrator limits the bandwidth of the loop to provide stable response. Use the digital input pin BSEL to select the bandwidth. For a shunt resistor of 22 Ω and BSEL = 0, the bandwidth is 32 kHz; for BSEL = 1, the bandwidth is 47 kHz.

Bandwidth can be reduced by increasing the value of the shunt resistor because the shunt resistor and the compensation coil resistance form a voltage divider. The reduced bandwidth (BW) can be calculated using Equation 2:

Equation 2. DRV425 ai_eq_bw_sbos729.gif

where

R_COIL = internal compensation coil resistance (100 Ω),
R_SHUNT = external shunt resistance, and
BW_22Ω = sensor bandwidth with R_SHUNT = 22 Ω (depending on the BSEL setting)

The bandwidth for a given shunt resistor value can also be calculated using the DRV425 System Parameter Calculator, SLOC331. For large magnetic fields (B > 500 μT), the effective bandwidth of the sensor is limited by fluxgate saturation effects. For a magnetic signal with a 2-mT amplitude, the large-signal bandwidth is 10 kHz with BSEL = 0 or 15 kHz with BSEL = 1.

Although the analog output responds slowly to large fields, a magnetic field with a magnitude of 1.6 mT (or higher) beyond the measurement range of the DRV425 triggers the ERROR pin within 4 µs to 6 µs. See the Magnetic Field Range, Overrange Indicator, and Error Flag section for more details.

7.3.1.3 Differential Driver for the Internal Compensation Coil

The differential compensation coil driver provides the current for the internal compensation coil at the DRV1 and DRV2 pins. The driver is capable of sourcing up to ±250 mA with a 5-V supply or up to ±150 mA in 3.3-V mode. The current capability is not internally limited. The actual value of the compensation coil current depends on the magnetic field strength and is limited by the sum of the resistance of the internal compensation coil and the external shunt resistor value. The internal compensation coil resistance depends on temperature (see Figure 17) and must be taken into account when dimensioning the system. Select the value of the shunt resistor to avoid OR pin trip levels in normal operation.

The common-mode voltage of the compensation coil driver outputs is set by the RSEL pins (see the Voltage Reference section). Thus, the common-mode voltage of the shunt-sense amplifier is matched if the internal reference is used.

Consider the polarity of the compensation coil connection to the output of the compensation coil driver. If the polarity is incorrect, then the driver output drives to the power-supply rails, even at low primary-current levels. In this case, interchange the connection of the DRV1 and DRV2 pins to the compensation coil.

7.3.1.4 Magnetic Field Range, Overrange Indicator, and Error Flag

The measurement range of the DRV425 is determined by the amount of current driven into the compensation coil and the output voltage range of the shunt-sense amplifier. The maximum compensation current is limited by the supply voltage and the series resistance of the compensation coil and the shunt.

The magnetic field range is adjusted with the external shunt resistor. The DRV425 System Parameter Calculator, SLOC331 provides the maximum shunt resistor values depending on the supply voltage (VDD) and the selected reference voltage (V_REFIN) for various magnetic field ranges.

For proper operation at a maximum field (B_MAX), choose a shunt resistor (R_SHUNT) using Equation 3

Equation 3. DRV425 ai_eq_rshunt_sbos729.gif

where

VDD = minimum supply voltage of the DRV425 (V),
V_REFIN = common-mode voltage of the shunt-sense amplifier (V), and
B_MAX = desired magnetic field range (T)

Alternatively, to adjust the output voltage of the DRV425 for a desired maximum voltage (V_VOUTMAX), use Equation 4:

Equation 4. DRV425 ai_eq_rshunt_voutmax_sbos729.gif

where

V_VOUTMAX = desired maximum output voltage at VOUT pin (V), and
B_MAX = desired magnetic field range (T)

To avoid railing of the compensation coil driver, assure that Equation 5 is fulfilled:

Equation 5. DRV425 ai_eq_bmax_sbos729.gif

where

B_MAX = desired magnetic field range (T),
R_COIL = compensation coil resistance (Ω),
VDD = minimum supply voltage of the DRV425 (V), and
V_REFIN = selected internal reference voltage value (V)

The DRV425 System Parameter Calculator, SLOC331 is designed to assist with selecting the system parameters.

The DRV425 offers two diagnostic output pins to detect large fields that exceed the measurement range of the sensor: the overrange indicator (OR) and the ERROR flag.

In normal operation, the DRV425 sensor feedback loop compensates the magnetic field inside the fluxgate to zero. Therefore, a large field inside the fluxgate indicates that the feedback loop is not properly working and the sensor output is invalid. To detect this condition, the ERROR pin is pulled low if the internal field exceeds 1.6 mT. The ERROR output is suppressed for 4 µs to 6 µs to prevent an undesired reaction to transients or noise. For static and slowly varying ambient fields, the ERROR pin triggers when the ambient field exceeds the sensor measurement range by more than 1.6 mT. For dynamic magnetic fields that exceed the sensor bandwidth as specified in the Specifications section, the feedback loop response is too slow to accurately compensate the internal field to zero. Therefore, high-frequency fields can trigger the ERROR pin, even if the ambient field does not exceed the measurement range by 1.6 mT.

In addition, the low-active overrange pin (OR) indicates railing of the output of the shunt-sense amplifier. The OR output is suppressed for 2.5 µs to 3.5 µs to prevent an undesired reaction to transients or noise. The OR pin trip level refers to the output voltage value of the shunt-sense amplifier as specified in the Specifications section. Use Equation 3 and Equation 4 to adjust the OR pin behavior to the specific system-level requirements.

Both the ERROR and OR pins are open-drain outputs that require an external pullup resistor. Connect both pins together with a single pullup resistor to provide a single diagnostic flag, if desired.

Based on the DRV425 System Parameter Calculator, SLOC331, for a design for a ±2-mT magnetic field input range with a supply of 5 V (±5%), a shunt resistor value of 22 Ω is selected and Figure 63 shows the status of the diagnostic flags in the resulting three operation ranges.

Figure 63. Magnetic Field Range of the DRV425 (VDD = 5 V and R_SHUNT = 22 Ω)

With the proper R_SHUNT value, the differential amplifier output rails and activates the overrange flag (OR = 0) when the magnetic field exceeds the designated operating range. For fields that exceed the measurement range of the DRV425 by ≥ 1.6 mT, the fluxgate is permanently saturated and the ERROR pin is pulled low. In this condition, the fluxgate sensor does not provide a valid output value and, therefore, the output VOUT of the DRV425 must be ignored. In applications where the ERROR pin cannot be separately monitored, combining the VOUT and ERROR outputs is recommended (as shown in Figure 64) to indicate a magnetic field outside of the sensor range by pulling the output of the DRV425 to ground.

Figure 64. Field Overrange Detection Using a Combined VOUT and ERROR Pin

7.3.2 Shunt-Sense Amplifier

The compensation coil current creates a voltage drop across the external shunt resistor, R_SHUNT. The internal differential amplifier senses this voltage drop. This differential amplifier offers wide bandwidth and a high slew rate. Excellent dc stability and accuracy result from a chopping technique. The voltage gain is 4 V/V, set by precisely-matched and thermally-stable internal resistors.

Both the AINN and AINP differential amplifier inputs are connected to the external shunt resistor. This shunt resistor, in series with the internal 10-kΩ input resistors of the shunt sense amplifier, causes an additional gain error. Therefore, for best common-mode rejection performance, place a dummy shunt resistor (R₅) with a value higher than the shunt resistor in series with the REFIN pin to restore the matching of both resistor dividers, as shown in Figure 65.

Figure 65. Internal Difference Amplifier with an Example of a Decoupling Filter

For an overall gain of 4 V/V, calculate the value of R₅ using Equation 6:

Equation 6. DRV425 q_r2_r1_sbos693.gif

where

R₂ / R₁ = R₄ / R₃ = 4,
R₅ = R_SHUNT × 4

If the input signal is large, the amplifier output drives close to the supply rails. The amplifier output is able to drive the input of a successive approximation register (SAR) analog-to-digital converter (ADC). For best performance, add an RC low-pass filter stage between the shunt-sense amplifier output and the ADC input. This filter limits the noise bandwidth and decouples the high-frequency sampling noise of the ADC input from the amplifier output. For filter resistor R_F and filter capacitor C_F values, see the specific converter recommendations in the respective product data sheet.

The shunt-sense amplifier output drives 100 pF directly and shows a 50% overshoot with a 1-nF capacitance. Filter resistor R_F extends the capacitive load range. Note that with an R_F of only 20 Ω, the load capacitor must be either less than 1 nF or more than 33 nF to avoid overshoot; with an R_F of 50 Ω, this transient area is avoided.

Reference input REFIN is the common-mode voltage node for the output signal VOUT. Use the internal voltage reference of the DRV425 by connecting the REFIN pin to the reference output REFOUT. To avoid mismatch errors, use the same reference voltage for REFIN and the ADC. Alternatively, use an ADC with a pseudo-differential input, with the positive input of the ADC connected to VOUT and the negative input connected to REFIN of the DRV425.

7.3.3 Voltage Reference

The internal precision voltage reference circuit offers low-drift performance at the REFOUT output pin and is used for internal biasing. The reference output is intended to be the common-mode voltage of the output (the VOUT pin) to provide a bipolar signal swing. This low-impedance output tolerates sink and source currents of ±5 mA. However, fast load transients can generate ringing on this line. A small series resistor of a few ohms improves the response, particularly for capacitive loads equal to or greater than 1 μF.

Adjust the value of the voltage reference output to the power supply of the DRV425 using mode selection pins RSEL0 and RSEL1, as shown in Table 1.

Table 1. Reference Output Voltage Selection

MODE	RSEL1	RSEL0	DESCRIPTION
V_REFOUT = 2.5 V	0	0	Use with a sensor module supply of 5 V
V_REFOUT = 1.65 V	0	1	Use with a sensor module supply of 3.3 V
Ratiometric output	1	x	Provides an output centered on VDD / 2

In ratiometric output mode, an internal resistor divider divides the power-supply voltage by a factor of two.

7.3.4 Low-Power Operation of the DRV425

In applications with low-bandwidth or low sample-rate requirements, the average power dissipation of the DRV425 can be significantly reduced by powering the device down between measurements. The DRV425 requires 300 μs to fully settle the analog output VOUT, as shown in Figure 66. To minimize power dissipation, the device can be powered down immediately after acquiring the sample by the ADC.

Figure 66. Settling Time of the DRV425 Output VOUT

7.4 Device Functional Modes

The DRV425 is operational when the power supply VDD is applied, as specified in the Specifications section. The DRV425 has no additional functional modes.