SCLA071 August 2024 TPLD1201 , TPLD1201-Q1 , TPLD1202 , TPLD1202-Q1 , TPLD801 , TPLD801-Q1
2 Thinking About a Lookup Table as a MUX
For many familiar with discrete logic, the logic becomes easier to think of the LUT as if there was a multiplex (MUX).
Figure 2-1 MUX Representation of a
LUT| B | A | OUT |
|---|---|---|
| 0 | 0 | Reg 0 |
| 0 | 1 | Reg 1 |
| 1 | 0 | Reg 2 |
| 1 | 1 | Reg 3 |
As shown in Figure 2-1 the inputs are more like select pins than actual inputs into logic gates. When A and B are both low Reg 0 is present at the output. When A is high and B is low Reg 1 is present at the output. When A is low and B is high Reg 2 is present at the output. When A and B are both high Reg 3 is present at the output . This means the user is not altering paths within the programmable logic when setting the LUT, but instead changing the value being pushed through by the MUX at any one time