SFFS192 March   2022 UCC5350-Q1 , UCC5390-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

1 Overview

This document contains information for UCC5350-Q1 (DWV SOIC-8 and D SOIC-8 package) and UCC5390-Q1 (DWV SOIC-8) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figures show the device functional block diagram for reference.

GUID-63F6B691-EAD0-4361-B991-D884598268FF-low.gif Figure 1-1 Functional Block Diagram of UCC5350-Q1
GUID-7F2A7BC9-80CB-484E-B5F1-AAB2150240E1-low.gif Figure 1-2 Functional Block Diagram of UCC5390-Q1

UCC5350-Q1 and UCC5390-Q1 were developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.