LM25141Functional Safety FIT Rate, FMD and Pin FMA
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1 Overview
This document contains information for LM25141 (VQFN package) to aid in a functional safety system design. Information provided are:
- Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
- Component failure modes and their distribution (FMD) based on the primary function of the device
- Pin failure mode analysis (Pin FMA)
Figure 1-1 shows the device functional block diagram for reference.
Figure 1-1 Functional Block
DiagramLM25141 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.
2 Functional Safety Failure In Time (FIT) Rates
This section provides Functional Safety Failure In Time (FIT) rates for LM25141 based on two different industry-wide used reliability standards:
- Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
- Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2
| FIT IEC TR 62380 / ISO 26262 | FIT (Failures Per 109 Hours) |
|---|---|
| Total Component FIT Rate | 15 |
| Die FIT Rate | 4 |
| Package FIT Rate | 11 |
The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:
- Mission Profile: Motor Control from Table 11
- Power dissipation: 750 mW
- Climate type: World-wide Table 8
- Package factor (lambda 3): Table 17b
- Substrate Material: FR4
- EOS FIT rate assumed: 0 FIT
| Table | Category | Reference FIT Rate | Reference Virtual TJ |
|---|---|---|---|
| 5 | CMOS/BICMOS ASICs Analog & Mixed > 50V supply | 32 FIT | 55°C |
The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.
3 Failure Mode Distribution (FMD)
The failure mode distribution estimation for LM25141 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
| Die Failure Modes | Failure Mode Distribution (%) |
|---|---|
| No output voltage | 60% |
| Output not in specification – voltage or timing | 25% |
| Gate driver stuck on | 5% |
| PG false trip or fails to trip | 5% |
| Short circuit any two pins | 5% |
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the LM25141. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuit to VIN (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the LM25141 pin diagram. For a detailed description of the device pins, please refer to the Pin Configuration and Functions section in the LM25141 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- Application circuit as per LM25141 data sheet is used
- PG is pulled up to VOUT
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| DEMB | 1 | VOUT = expected, DEMB mode only, and no synchronization is available. | C |
| If DEMB = VDDA, VOUT = 0 V. Loaded VCC output | B | ||
| VDDA | 2 | VOUT = 0 V. No switching. Loaded VCC output | B |
| AGND | 3 | AGND is GND. VOUT = expected | D |
| RT | 4 | Normal operation. VOUT = expected. FSW defaults to 2.2 MHz or 440 kHz, depending on OSC. | C |
| DITH | 5 | Dither disabled. VOUT = expected | C |
| OSC | 6 | If OSC = GND, then FSW = 440 kHz. VOUT = expected | C |
| If OSC = VDDA, then VOUT = 0 V. Loaded VCC output | |||
| LOL | 7 | VOUT = 0 V. The VCC regulator is loaded to current limit. | B |
| LO | 8 | VOUT = 0 V. The VCC regulator is loaded to current limit. | B |
| PGND | 9 | PGND is GND. VOUT = expected | D |
| VCC | 10 | VOUT = 0 V. The VCC regulator is loaded to current limit. | B |
| HB | 11 | VOUT = 0 V. The VCC regulator is loaded to current limit. | B |
| SW | 12 | VOUT = 0 V. Excessive current from VIN | B |
| HO | 13 | VOUT = 0 V. High-side MOSFET cannot be turned on. | B |
| HOL | 14 | VOUT = 0 V. High-side MOSFET cannot be turned on. | B |
| VIN | 15 | VOUT = 0 V | B |
| VCCX | 16 | VOUT = expected. The internal VCC regulator provides bias voltage. | C |
| VOUT | 17 | VOUT = 0 V. Current limit reached and hiccup mode occurs. | B |
| CS | 18 | VOUT = 0 V | B |
| FB | 19 | If FB = VDDA, then VOUT = 0 V. | D |
| If FB = GND, then VOUT = 5 V. | B | ||
| COMP | 20 | VOUT = 0 V | B |
| PG | 21 | VPG = 0 V. VOUT = expected | C |
| SS | 22 | VOUT = 0 V | C |
| EN | 23 | VOUT = 0 V. The LM25141 is disabled and enters shutdown. | C |
| RES | 24 | VOUT = expected. The LM25141 cannot exit hiccup mode. | C |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| DEMB | 1 | Diode emulation/FPWM mode undefined. VOUT = expected, erratic switching | C |
| VDDA | 2 | VOUT = 0 V. Poor noise immunity | C |
| AGND | 3 | VOUT = 0 V | B |
| RT | 4 | Normal operation. Frequency modulation feature is disabled. VOUT = expected | C |
| DITH | 5 | VOUT = expected | C |
| OSC | 6 | FSW 440 kHz or 2.2 MHz. VOUT = expected | C |
| LOL | 7 | VOUT = 0 V. No discharge path for low-side MOSFET gate | B |
| LO | 8 | VOUT = expected. Lower efficiency | C |
| PGND | 9 | VOUT = 0 V. Uncontrolled behavior because of floating ground | B |
| VCC | 10 | VOUT = 0 V | B |
| HB | 11 | VOUT = 0 V. High-side gate drive floating | B |
| SW | 12 | VOUT = VIN. High-side FET control floating | B |
| HO | 13 | VOUT = 0 V. Will not regulate | B |
| HOL | 14 | VOUT = VIN. Will not regulate. Excessive current from VIN | B |
| VIN | 15 | VOUT = 0 V | B |
| VCCX | 16 | VOUT = expected | D |
| VOUT | 17 | VOUT = oscillation. Will not regulate | B |
| CS | 18 | VOUT = oscillation. No overcurrent or current sense information for current mode control. | B |
| FB | 19 | VOUT will not regulate. The controller will be configured for adjustable output. | B |
| COMP | 20 | VOUT = oscillation. Will not regulate | B |
| PG | 21 | VOUT = expected. No PG information | C |
| SS | 22 | VOUT = expected | D |
| EN | 23 | VOUT = 0 V | B |
| RES | 24 | VOUT = expected. Will exit hiccup mode quickly because low parasitic capacitor value. | C |
| Pin Name | Pin No. | Shorted To | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| DEMB | 1 | VDDA | VOUT = regulation, normal operation, and FPWM mode is enabled. | C |
| VDDA | 2 | AGND | VOUT = 0 V | B |
| AGND | 3 | RT | VOUT = regulation. Frequency modulation is disabled. | C |
| RT | 4 | DITH | VOUT = regulation. Frequency modulation is disabled. | C |
| DITH | 5 | OSC | VOUT = regulation. FSW = 440 kHz | C |
| OSC | 6 | LOL | VOUT = unregulated | B |
| LOL | 7 | LO | VOUT = expected | C |
| LO | 8 | PGND | VOUT = 0 V | B |
| PGND | 9 | VCC | VOUT = 0 V | B |
| VCC | 10 | HB | VOUT = 0 V | B |
| HB | 11 | SW | VOUT = 0 V. The VCC regulator is in current limit. | B |
| SW | 12 | HO | VOUT = 0 V | B |
| HO | 13 | HOL | VOUT = expected | B |
| HOL | 14 | VIN | VOUT = 0 V | A |
| VIN | 15 | VCCX | If VVIN > 6.5 V, then VOUT = 0 V. Exceeds the VCCX absolute maximum ratings | A |
| VCCX | 16 | VOUT | VOUT = expected | D |
| If VOUT is > 6.5 V, then it exceeds the VCCX absolute maximum rating. | A | |||
| VOUT | 17 | CS | VOUT cannot regulate, current limit is disabled, and there is no current sense information. | B |
| CS | 18 | FB | If FB = VDDA, then VOUT = 3.3 V. | B |
| If FB = GND, then VOUT = 0 V. Excessive current from VIN | B | |||
| FB | 19 | COMP | If FB = VDDA, then VOUT = VIN. | A |
| If FB = GND, then VOUT = 0 V. | B | |||
| COMP | 20 | PG | VOUT = 0 V | B |
| PG | 21 | SS | VOUT = 0 V | B |
| SS | 22 | EN | If VEN > 6.5 V, then it will exceed the absolute maximum rating of the SS pin. VOUT = 0 V | A |
| EN | 23 | RES | If VEN > 6.5 V, then it will exceed the absolute maximum rating of the SS pin. VOUT = 0 V | A |
| RES | 24 | DEMB | If DEMB = GND, VOUT = regulation, then it will not restart if current limit is reached. | B |
| If DEMB = VDDA, then VOUT = regulation. No hiccup mode | B |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| DEMB | 1 | If DEMB = GND, then VOUT = 0 V. Excessive current for VIN | B |
| If DEMB = VDDA and VVIN < 6.5 V, then VOUT = expected and there is erratic switching. | B | ||
| If VVIN > 6.5 V and exceeds the maximum rating of the DEMP pin, the device is damaged. | A | ||
| VDDA | 2 | If VVIN > 6.5 V, VOUT = 0 V, and exceeds the maximum rating of the VDDA pin, the device is damaged. | A |
| If VVIN < 6.5 V, then VOUT = expected. | D | ||
| AGND | 3 | High VIN current. VOUT = 0 V | B |
| RT | 4 | If VVIN < 6.5 V, then VOUT = 0 V. | B |
| If VVIN > 6.5 V and exceeds the maximum ratings, then the device is damaged. | A | ||
| DITH | 5 | If VVIN > 6.5 V, the device is damaged. | A |
| If VVIN < 6.5 V, OUT = expected. No spread spectrum | C | ||
| OSC | 6 | If OSC = GND and high VIN current, then VOUT = 0 V. | B |
| If OSC = VDDA, VIN > 6.5 V, the device is damaged, and VOUT = 0 V. | A | ||
| If OSC = VDDA, VIN < 6.5 V, VOUT = expected, and there is erratic switching. | C | ||
| LOL | 7 | If VVIN < 6.5 V, VOUT = 0 V and there is excessive current from VIN. | B |
| If VVIN > 6.5 V, exceeds the maximum ratings for the LO pin and the device is damaged. | A | ||
| LO | 8 | If VVIN < 6.5 V, VOUT = 0 V and there is excessive current from VIN. | B |
| If VVIN > 6.5 V, exceeds the maximum ratings for the LOL pin, the device is damaged | A | ||
| PGND | 9 | VOUT = 0 V. Excessive current from VIN | B |
| VCC | 10 | If VVIN < 6.5 V, then VOUT = expected. | D |
| If VVIN > 6.5 V, exceeds the maximum ratings and the device is damaged. | A | ||
| HB | 11 | If VVIN < 6.5 V, then VOUT = expected and there is erratic switching. | B |
| If VVIN > 6.5 V, exceeds the maximum rating the device is damaged and VOUT = VIN. | A | ||
| SW | 12 | VOUT = VIN. Excessive current from VIN | A |
| HO | 13 | If VVIN < 6.5 V, VOUT drops lower than VIN, no switching, and excessive current from VIN. | B |
| If VVIN > 6.5 V, exceeds maximum ratings of the HO pin, the device is damaged, and VOUT = VIN. | A | ||
| HOL | 14 | If VVIN < 6.5 V, VOUT drops lower than VIN, no switching, and excessive current from VIN. | B |
| If VVIN > 6.5 V, exceeds maximum ratings of the HO pin, the device is damaged, and VOUT = VIN. | |||
| VIN | 15 | N/A | B |
| VCCX | 16 | For VCCX = VOUT, VIN < 6.5 V and VOUT = VIN. | B |
| If VVIN > 6.5 V, it exceeds the VCCX pin maximum rated voltage and the LM25141 is damaged. | A | ||
| VOUT | 17 | If VVIN < 15.5 V, VOUT = VIN. | B |
| If VVIN > 15.5 V and exceeds the maximum rating, the LM25141 is damaged. | A | ||
| CS | VVIN < 6.5 V. VOUT = VIN | B | |
| If VVIN > 15.5 V and exceeds the maximum rating, the LM25141 is damaged. | A | ||
| FB | 19 | If VVIN < 6.5 V, FB = VDDA, then VOUT = expected. | B |
| If VVIN < 6.5 V, FB = GND, then VOUT = 0 V. Excessive current from VIN | B | ||
| If VVIN > 6.5 V and exceeds the maximum ratings, the LM25141 is damaged. | A | ||
| COMP | 20 | If VVIN > 5 V and < 6.5 V, VOUT = 0 V | B |
| If VVIN > 6.5 V and exceeds the maximum ratings, the LM25141 is damaged. | A | ||
| PG | 21 | If VVIN < 6.5 V, VOUT = expected and PG forced high. | B |
| If VVIN > 6.5 V and exceeds the maximum ratings, the LM25141 is damaged. | A | ||
| SS | 22 | If VVIN < 6.5 V, then VOUT = expected. | D |
| If VVIN > 6.5 V and exceeds the maximum ratings, the LM25141 is damaged. | A | ||
| EN | 23 | VOUT = expected | D |
| RES | 24 | If VVIN < 6.5 V, VOUT = expected. No hiccup mode | C |
| If VVIN > 6.5 V and exceeds the maximum ratings, the LM25141 is damaged. | A |
