SFFS658 july 2023 DAC539G2-Q1
The failure mode distribution estimation for the DAC539G2-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or over stress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
Digital core - digital interface (communication loss) | 25 |
Digital core - state machine (LUT malfunction) | 17 |
NVM retention loss | 13 |
Voltage to PWM frequency error | 5 |
Voltage to PWM duty cycle error | 20 |
Total unadjusted error (TUE) at output of GPI-to-VOUT | 20 |