SLAA334B September   2006  – August 2018 MSP430BT5190 , MSP430F1101 , MSP430F1101A , MSP430F1111A , MSP430F112 , MSP430F1121 , MSP430F1121A , MSP430F1122 , MSP430F1132 , MSP430F122 , MSP430F1222 , MSP430F123 , MSP430F1232 , MSP430F133 , MSP430F135 , MSP430F147 , MSP430F1471 , MSP430F148 , MSP430F1481 , MSP430F149 , MSP430F1491 , MSP430F155 , MSP430F156 , MSP430F157 , MSP430F1610 , MSP430F1611 , MSP430F1612 , MSP430F167 , MSP430F168 , MSP430F169 , MSP430F2001 , MSP430F2002 , MSP430F2003 , MSP430F2011 , MSP430F2012 , MSP430F2013 , MSP430F2013-EP , MSP430F2101 , MSP430F2111 , MSP430F2112 , MSP430F2121 , MSP430F2122 , MSP430F2131 , MSP430F2132 , MSP430F2232 , MSP430F2234 , MSP430F2252 , MSP430F2252-Q1 , MSP430F2254 , MSP430F2272 , MSP430F2272-Q1 , MSP430F2274 , MSP430F233 , MSP430F2330 , MSP430F235 , MSP430F2350 , MSP430F2370 , MSP430F2410 , MSP430F2416 , MSP430F2417 , MSP430F2418 , MSP430F2419 , MSP430F247 , MSP430F2471 , MSP430F248 , MSP430F2481 , MSP430F249 , MSP430F2491 , MSP430F2616 , MSP430F2617 , MSP430F2618 , MSP430F2619 , MSP430F412 , MSP430F413 , MSP430F4132 , MSP430F415 , MSP430F4152 , MSP430F417 , MSP430F423 , MSP430F423A , MSP430F425 , MSP430F4250 , MSP430F425A , MSP430F4260 , MSP430F427 , MSP430F4270 , MSP430F427A , MSP430F435 , MSP430F4351 , MSP430F436 , MSP430F4361 , MSP430F437 , MSP430F4371 , MSP430F438 , MSP430F439 , MSP430F447 , MSP430F448 , MSP430F4481 , MSP430F449 , MSP430F4491 , MSP430F4616 , MSP430F46161 , MSP430F4617 , MSP430F46171 , MSP430F4618 , MSP430F46181 , MSP430F4619 , MSP430F46191 , MSP430F47126 , MSP430F47127 , MSP430F47163 , MSP430F47166 , MSP430F47167 , MSP430F47173 , MSP430F47176 , MSP430F47177 , MSP430F47183 , MSP430F47186 , MSP430F47187 , MSP430F47193 , MSP430F47196 , MSP430F47197 , MSP430F477 , MSP430F478 , MSP430F4783 , MSP430F4784 , MSP430F479 , MSP430F4793 , MSP430F4794 , MSP430F5131 , MSP430F5132 , MSP430F5151 , MSP430F5152 , MSP430F5171 , MSP430F5172 , MSP430F5304 , MSP430F5308 , MSP430F5309 , MSP430F5310 , MSP430F5324 , MSP430F5325 , MSP430F5326 , MSP430F5327 , MSP430F5328 , MSP430F5329 , MSP430F5333 , MSP430F5336 , MSP430F5338 , MSP430F5340 , MSP430F5341 , MSP430F5342 , MSP430F5418 , MSP430F5418A , MSP430F5419 , MSP430F5419A , MSP430F5435 , MSP430F5435A , MSP430F5436 , MSP430F5436A , MSP430F5437 , MSP430F5437A , MSP430F5438 , MSP430F5438A , MSP430F5500 , MSP430F5501 , MSP430F5502 , MSP430F5503 , MSP430F5504 , MSP430F5505 , MSP430F5506 , MSP430F5507 , MSP430F5508 , MSP430F5509 , MSP430F5510 , MSP430F5630 , MSP430F5631 , MSP430F5632 , MSP430F5633 , MSP430F5634 , MSP430F5635 , MSP430F5636 , MSP430F5637 , MSP430F5638 , MSP430F6433 , MSP430F6435 , MSP430F6436 , MSP430F6438 , MSP430F6630 , MSP430F6631 , MSP430F6632 , MSP430F6633 , MSP430F6634 , MSP430F6635 , MSP430F6636 , MSP430F6637 , MSP430F6638 , MSP430FE423 , MSP430FE4232 , MSP430FE423A , MSP430FE4242 , MSP430FE425 , MSP430FE4252 , MSP430FE425A , MSP430FE427 , MSP430FE4272 , MSP430FE427A , MSP430FG4250 , MSP430FG4260 , MSP430FG4270 , MSP430FG437 , MSP430FG438 , MSP430FG439 , MSP430FG4616 , MSP430FG4617 , MSP430FG4618 , MSP430FG4619 , MSP430FG477 , MSP430FG478 , MSP430FG479 , MSP430FW423 , MSP430FW425 , MSP430FW427 , MSP430G2001 , MSP430G2101 , MSP430G2102 , MSP430G2111 , MSP430G2112 , MSP430G2121 , MSP430G2131 , MSP430G2132 , MSP430G2152 , MSP430G2201 , MSP430G2201-Q1 , MSP430G2211 , MSP430G2212 , MSP430G2221 , MSP430G2231 , MSP430G2231-Q1 , MSP430G2232 , MSP430G2252 , MSP430G2302 , MSP430G2312 , MSP430G2332 , MSP430G2352 , MSP430G2402 , MSP430G2432 , MSP430G2452 , MSP430L092

 

  1.   MSP430 Flash Memory Characteristics
    1.     Trademarks
    2. 1 Flash Memory
    3. 2 Simplified Flash Memory Cell
    4. 3 Flash Memory Parameters
      1. 3.1 Data Retention
        1. 3.1.1 Leakage Mechanism
        2. 3.1.2 Data Retention Time
      2. 3.2 Flash Endurance
      3. 3.3 Cumulative Program Time
    5. 4 Flash Enhancements With Software
      1. 4.1 EEPROM Emulation With Flash
      2. 4.2 Enhancing Flash Data Retention Time With Flash Refresh
      3. 4.3 Verify Flash Data With a Checksum or CRC
    6. 5 Conclusion
    7. 6 References
  2.   Revision History

Cumulative Program Time

It is very easy to erase and program flash memory of a MSP430 with user-written software. A chapter explaining how to do this is in the family user’s guides, and code examples for flash erasure and programming are available at http://www.ti.com/msp430.

It is possible to program single bits, bytes, or words of MSP430 flash memory. The designer can also program any 16-bit word up to two times and, with this method, can change additional bits from logic 1 to 0. But the cumulative program time parameter limits the number of over-programming operations between two erase cycles.

Before programming flash by software, the input clock divider of the flash timing generator must be programmed to a correct value. The data sheet allows a flash timing generator frequency between 257 kHz and 476 kHz. Please check the data sheet for correct values for each MSP430 derivative.

The MSP430F1xx and MSP430F4xx data sheets also state that programming one flash cell (byte or word) needs 35 flash timing generator clock cycles. During these 35 clock cycles, the high voltage for flash programming internally is applied for only 29 clock cycles, 6 clock cycles less than the complete cycle.

The MSP430F2xx data sheets specify flash programming a higher speed, as only 30 clock cycles to program one flash cell are needed. For flash programming, the high voltage is only applied for 27 cycles, 3 cycles less than the complete programming cycle.

Each time a single bit, byte, or word is programmed, a complete row of 64-byte flash cells sees the high voltage necessary for programming. This high voltage generates some stress to the complete row of flash cells, and this stress must be time limited to avoid damage. The next erase cycle resets this stress time to zero, and the cumulative program time restarts again from the beginning. According to the data sheet, as shown in Table 3, this high-voltage stress must be limited to 10 ms between two erase cycles. See the data sheets for the correct values for each MSP430 derivative.

The same 16-bit flash word cannot be programmed more than twice before the next erase cycle. Writing to one 16-bit word with two byte-wise programming cycles counts as two programming cycles. Single-bit overprogramming is possible only once, if the flash cell previously has been programmed 16-bit word wise.

Writing to the same row too many times can result in write disturb, and erased bits will be programmed as well. This produces no physical damage and, after erase, the disturbed bits are programmable as before. No long term effects are known.

Table 3. Example of Cumulative Program Time in the Data Sheets

PARAMETER TEST CONDITIONS VCC MIN MAX UNIT
Cumulative program time  (1) 2.7 V, 3.6 V 10 ms
The cumulative program time must not be exceeded when writing to a 64-byte flash block. This parameter applies to all programming methods: individual word write, byte write, and block write.

The following examples show some scenarios and the influence of the cumulative program time on possible over-programming of one cell.

Example 1

The flash timing generator is programmed to its minimum frequency of 257 kHz. Under this condition, the high-voltage stress to program one single flash byte or word lasts for:

Equation 3. t high _ voltage = 1 257   kHz ×29 =113 µ s

This allows, within the cumulative program time of 10 ms/113 µs = 88 programming cycles for bits, bytes, or words. To program one flash row of 32 words (64 bytes) word wise, 32 programming cycles are necessary. After these 32 programming cycles, in this example, additional 56 programming cycles are left for programming additional bits of this flash row. Byte-wise programming needs 64 programming cycles for one flash row, and this leaves only 24 programming cycles for additional bit programming.

Example 2

The flash timing generator is programmed to its maximum frequency of 476 kHz. Under this condition, the high-voltage stress to program one single flash byte or word is:

Equation 4. t high _ voltage = 1 476   kHz ×29 =61 µ s

In this case, there is 10 ms/61 µs = 164 cycles for bit, byte, or word programming available, before the flash segment must be erased. Programming the 32 words of this flash line byte wise uses 64 cycles of the available 164 cycles. Hence, theoretically, 100 additional flash programming cycles are left to add additional logic 0 levels to this flash row. Because programming each word more than two times is not allowed, only another 64 cycles can be executed.

Programming flash in the block write mode is quicker and, therefore, leaves more time for single-bit over-programming operations within one flash row.

When using the digitally controlled oscillator (DCO) as clock source for the flash timing generator, it is important to check the worse-case accuracy of the DCO frequency. In many MSP430 derivatives, the DCO frequency is very temperature dependent and also has some VCC dependence. Therefore, it is good practice to select a flash timing generator frequency in the middle of the allowed range. To program the flash timing generator frequency close to one of its data-sheet limits, use an accurate clock source. Either a high-frequency crystal clock source or calibration of the DCO frequency using a 32-kHz crystal clock are options.

Programming the flash with a flash timing generator frequency outside the data-sheet specifications can give correct results at first but can lead to reduced data-retention time and affect flash reliability. Not following the cumulative programming time parameter can also result in bit failures and generally reduced reliability of the MSP430 flash memory.